Commit c8588697 authored by Rodrigo Siqueira's avatar Rodrigo Siqueira Committed by Alex Deucher
Browse files

drm/amd/display: Drop uncessary OTG lock check



The OTG_MASTER_UPDATE_LOCK_SEL is used for GSL and OTGs in the same
group for selecting the OTG_MASTER_UPDATE_LOCK from the same OTG. At
some point, it a check was added to see if OTG is running or not, which
is not necessary, and for this reason, this commit dropped that check.

Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Acked-by: default avatarQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 15e8b368
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+1 −10
Original line number Diff line number Diff line
@@ -646,13 +646,6 @@ uint32_t optc1_get_vblank_counter(struct timing_generator *optc)
void optc1_lock(struct timing_generator *optc)
{
	struct optc *optc1 = DCN10TG_FROM_TG(optc);
	uint32_t regval = 0;

	regval = REG_READ(OTG_CONTROL);

	/* otg is not running, do not need to be locked */
	if ((regval & 0x1) == 0x0)
		return;

	REG_SET(OTG_GLOBAL_CONTROL0, 0,
			OTG_MASTER_UPDATE_LOCK_SEL, optc->inst);
@@ -660,13 +653,11 @@ void optc1_lock(struct timing_generator *optc)
			OTG_MASTER_UPDATE_LOCK, 1);

	/* Should be fast, status does not update on maximus */
	if (optc->ctx->dce_environment != DCE_ENV_FPGA_MAXIMUS) {

	if (optc->ctx->dce_environment != DCE_ENV_FPGA_MAXIMUS)
		REG_WAIT(OTG_MASTER_UPDATE_LOCK,
				UPDATE_LOCK_STATUS, 1,
				1, 10);
}
}

void optc1_unlock(struct timing_generator *optc)
{