Commit be3a432a authored by Fangzhi Zuo's avatar Fangzhi Zuo Committed by Alex Deucher
Browse files

drm/amd/display: Add Error Code for Dml Validation Failure 



Any invalid mode from hw perspective should be given corresponding
error code, otherwise it leads to confusing warning message
"[drm] Mode Validation Warning: Validation OK failed validation."

Acked-by: default avatarStylon Wang <stylon.wang@amd.com>
Signed-off-by: default avatarFangzhi Zuo <jerry.zuo@amd.com>
Reviewed-by: default avatarDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 3d8de40f

drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

+59 −0
Original line number Diff line number Diff line
@@ -5557,6 +5557,65 @@ void dml314_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_ 
			}

		}

	}

	for (i = v->soc.num_states; i >= 0; i--) {

		for (j = 0; j < 2; j++) {

			enum dm_validation_status status = DML_VALIDATION_OK;



			if (!v->ScaleRatioAndTapsSupport) {

				status = DML_FAIL_SCALE_RATIO_TAP;

			} else if (!v->SourceFormatPixelAndScanSupport) {

				status = DML_FAIL_SOURCE_PIXEL_FORMAT;

			} else if (!v->ViewportSizeSupport[i][j]) {

				status = DML_FAIL_VIEWPORT_SIZE;

			} else if (P2IWith420) {

				status = DML_FAIL_P2I_WITH_420;

			} else if (DSCOnlyIfNecessaryWithBPP) {

				status = DML_FAIL_DSC_ONLY_IF_NECESSARY_WITH_BPP;

			} else if (DSC422NativeNotSupported) {

				status = DML_FAIL_NOT_DSC422_NATIVE;

			} else if (!v->ODMCombine4To1SupportCheckOK[i]) {

				status = DML_FAIL_ODM_COMBINE4TO1;

			} else if (v->NotEnoughDSCUnits[i]) {

				status = DML_FAIL_NOT_ENOUGH_DSC;

			} else if (!v->ROBSupport[i][j]) {

				status = DML_FAIL_REORDERING_BUFFER;

			} else if (!v->DISPCLK_DPPCLK_Support[i][j]) {

				status = DML_FAIL_DISPCLK_DPPCLK;

			} else if (!v->TotalAvailablePipesSupport[i][j]) {

				status = DML_FAIL_TOTAL_AVAILABLE_PIPES;

			} else if (!EnoughWritebackUnits) {

				status = DML_FAIL_ENOUGH_WRITEBACK_UNITS;

			} else if (!v->WritebackLatencySupport) {

				status = DML_FAIL_WRITEBACK_LATENCY;

			} else if (!v->WritebackScaleRatioAndTapsSupport) {

				status = DML_FAIL_WRITEBACK_SCALE_RATIO_TAP;

			} else if (!v->CursorSupport) {

				status = DML_FAIL_CURSOR_SUPPORT;

			} else if (!v->PitchSupport) {

				status = DML_FAIL_PITCH_SUPPORT;

			} else if (ViewportExceedsSurface) {

				status = DML_FAIL_VIEWPORT_EXCEEDS_SURFACE;

			} else if (!v->PrefetchSupported[i][j]) {

				status = DML_FAIL_PREFETCH_SUPPORT;

			} else if (!v->DynamicMetadataSupported[i][j]) {

				status = DML_FAIL_DYNAMIC_METADATA;

			} else if (!v->TotalVerticalActiveBandwidthSupport[i][j]) {

				status = DML_FAIL_TOTAL_V_ACTIVE_BW;

			} else if (!v->VRatioInPrefetchSupported[i][j]) {

				status = DML_FAIL_V_RATIO_PREFETCH;

			} else if (!v->PTEBufferSizeNotExceeded[i][j]) {

				status = DML_FAIL_PTE_BUFFER_SIZE;

			} else if (v->NonsupportedDSCInputBPC) {

				status = DML_FAIL_DSC_INPUT_BPC;

			} else if ((v->HostVMEnable

					&& !v->ImmediateFlipSupportedForState[i][j])) {

				status = DML_FAIL_HOST_VM_IMMEDIATE_FLIP;

			} else if (FMTBufferExceeded) {

				status = DML_FAIL_FMT_BUFFER_EXCEEDED;

			}

			mode_lib->vba.ValidationStatus[i] = status;

		}

	}



	{

		unsigned int MaximumMPCCombine = 0;

drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h

+8 −0
Original line number Diff line number Diff line
@@ -190,6 +190,14 @@ enum dm_validation_status { 
	DML_FAIL_DSC_INPUT_BPC,

	DML_FAIL_PREFETCH_SUPPORT,

	DML_FAIL_V_RATIO_PREFETCH,

	DML_FAIL_P2I_WITH_420,

	DML_FAIL_DSC_ONLY_IF_NECESSARY_WITH_BPP,

	DML_FAIL_NOT_DSC422_NATIVE,

	DML_FAIL_ODM_COMBINE4TO1,

	DML_FAIL_ENOUGH_WRITEBACK_UNITS,

	DML_FAIL_VIEWPORT_EXCEEDS_SURFACE,

	DML_FAIL_DYNAMIC_METADATA,

	DML_FAIL_FMT_BUFFER_EXCEEDED,

};



enum writeback_config {