Commit bb7939b2 authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/amdgpu: fix VA hole handling on Vega10 v3 



Similar to the CPU address space the VA on Vega10 has a hole in it.

v2: use dev_dbg instead of dev_err
v3: add some more comments to explain how the hw works

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6af046d2

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+5 −5
Original line number Diff line number Diff line
@@ -870,8 +870,8 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev, 
			struct amdgpu_bo_va_mapping *m;

			struct amdgpu_bo *aobj = NULL;

			struct amdgpu_cs_chunk *chunk;

			uint64_t offset, va_start;

			struct amdgpu_ib *ib;

			uint64_t offset;

			uint8_t *kptr;



			chunk = &p->chunks[i];
@@ -881,14 +881,14 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev, 
			if (chunk->chunk_id != AMDGPU_CHUNK_ID_IB)

				continue;



			r = amdgpu_cs_find_mapping(p, chunk_ib->va_start,

						   &aobj, &m);

			va_start = chunk_ib->va_start & AMDGPU_VA_HOLE_MASK;

			r = amdgpu_cs_find_mapping(p, va_start, &aobj, &m);

			if (r) {

				DRM_ERROR("IB va_start is invalid\n");

				return r;

			}



			if ((chunk_ib->va_start + chunk_ib->ib_bytes) >

			if ((va_start + chunk_ib->ib_bytes) >

			    (m->last + 1) * AMDGPU_GPU_PAGE_SIZE) {

				DRM_ERROR("IB va_start+ib_bytes is invalid\n");

				return -EINVAL;
@@ -901,7 +901,7 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev, 
			}



			offset = m->start * AMDGPU_GPU_PAGE_SIZE;

			kptr += chunk_ib->va_start - offset;

			kptr += va_start - offset;



			memcpy(ib->ptr, kptr, chunk_ib->ib_bytes);

			amdgpu_bo_kunmap(aobj);

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

+11 −0
Original line number Diff line number Diff line
@@ -564,6 +564,17 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data, 
		return -EINVAL;

	}



	if (args->va_address >= AMDGPU_VA_HOLE_START &&

	    args->va_address < AMDGPU_VA_HOLE_END) {

		dev_dbg(&dev->pdev->dev,

			"va_address 0x%LX is in VA hole 0x%LX-0x%LX\n",

			args->va_address, AMDGPU_VA_HOLE_START,

			AMDGPU_VA_HOLE_END);

		return -EINVAL;

	}



	args->va_address &= AMDGPU_VA_HOLE_MASK;



	if ((args->flags & ~valid_flags) && (args->flags & ~prt_flags)) {

		dev_err(&dev->pdev->dev, "invalid flags combination 0x%08X\n",

			args->flags);

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

+3 −1
Original line number Diff line number Diff line
@@ -578,7 +578,9 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file 
		if (amdgpu_sriov_vf(adev))

			dev_info.ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION;

		dev_info.virtual_address_offset = AMDGPU_VA_RESERVED_SIZE;

		dev_info.virtual_address_max = (uint64_t)adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE;

		dev_info.virtual_address_max =

			min(adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE,

			    AMDGPU_VA_HOLE_START);

		dev_info.virtual_address_alignment = max((int)PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);

		dev_info.pte_fragment_size = (1 << adev->vm_manager.fragment_size) * AMDGPU_GPU_PAGE_SIZE;

		dev_info.gart_page_size = AMDGPU_GPU_PAGE_SIZE;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h

+13 −0
Original line number Diff line number Diff line
@@ -96,6 +96,19 @@ struct amdgpu_bo_list_entry; 
/* hardcode that limit for now */

#define AMDGPU_VA_RESERVED_SIZE			(8ULL << 20)



/* VA hole for 48bit addresses on Vega10 */

#define AMDGPU_VA_HOLE_START			0x0000800000000000ULL

#define AMDGPU_VA_HOLE_END			0xffff800000000000ULL



/*

 * Hardware is programmed as if the hole doesn't exists with start and end

 * address values.

 *

 * This mask is used to remove the upper 16bits of the VA and so come up with

 * the linear addr value.

 */

#define AMDGPU_VA_HOLE_MASK			0x0000ffffffffffffULL



/* max vmids dedicated for process */

#define AMDGPU_VM_MAX_RESERVED_VMID	1