Commit bb747bec authored by Akhil R's avatar Akhil R Committed by Thierry Reding
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dt-bindings: Add headers for Tegra234 I2C 



Add dt-bindings header files for I2C controllers for Tegra234

Signed-off-by: default avatarAkhil R <akhilrajeev@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent e783362e

include/dt-bindings/clock/tegra234-clock.h

+18 −1
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@@ -20,6 +20,24 @@ 
#define TEGRA234_CLK_EMC			31U

/** @brief output of gate CLK_ENB_FUSE */

#define TEGRA234_CLK_FUSE			40U

/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2C1 */

#define TEGRA234_CLK_I2C1			48U

/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2C2 */

#define TEGRA234_CLK_I2C2			49U

/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2C3 */

#define TEGRA234_CLK_I2C3			50U

/** output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2C4 */

#define TEGRA234_CLK_I2C4			51U

/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2C6 */

#define TEGRA234_CLK_I2C6			52U

/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2C7 */

#define TEGRA234_CLK_I2C7			53U

/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2C8 */

#define TEGRA234_CLK_I2C8			54U

/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2C9 */

#define TEGRA234_CLK_I2C9			55U

/** @brief PLLP clk output */

#define TEGRA234_CLK_PLLP_OUT0			102U

/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC4 */

#define TEGRA234_CLK_SDMMC4			123U

/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_UARTA */
@@ -30,5 +48,4 @@ 
#define TEGRA234_CLK_PLLC4			237U

/** @brief 32K input clock provided by PMIC */

#define TEGRA234_CLK_CLK_32K			289U



#endif

include/dt-bindings/reset/tegra234-reset.h

+8 −0
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@@ -10,6 +10,14 @@ 
 * @brief Identifiers for Resets controllable by firmware

 * @{

 */

#define TEGRA234_RESET_I2C1			24U

#define TEGRA234_RESET_I2C2			29U

#define TEGRA234_RESET_I2C3			30U

#define TEGRA234_RESET_I2C4			31U

#define TEGRA234_RESET_I2C6			32U

#define TEGRA234_RESET_I2C7			33U

#define TEGRA234_RESET_I2C8			34U

#define TEGRA234_RESET_I2C9			35U

#define TEGRA234_RESET_SDMMC4			85U

#define TEGRA234_RESET_UARTA			100U