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Commit b6ee0bbf authored by Biju Das's avatar Biju Das Committed by Geert Uytterhoeven
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clk: renesas: r9a07g044: Add POEG clock and reset entries 



Add POEG clock and reset entries to CPG driver.

Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220510110653.7326-3-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 1fb7a9fb
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