Commit b301c858 authored by Rene Sapiens's avatar Rene Sapiens Committed by Greg Kroah-Hartman
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staging: ti dspbridge: Rename words with camel case. 



The intention of this patch is to rename the remaining variables with camel
case. Variables will be renamed avoiding camel case and Hungarian notation.
The words to be renamed in this patch are:
========================================
dspAddr to dsp_address
dspAdr to dsp_adr
dspBaseVirt to dsp_base_virt
dwDeviceContext to device_context
dwDSPAddrOffset to dsp_addr_offset
dwDSPAddr to dsp_addr
dwErrInfo to error_info
dwGPPBaseBA to gpp_base_ba
dwMask to mask
dwTimeout to timeout
dwTimeOut to timeout
dwValue to value
entryNum to entry_num
execFile to exec_file
fFlush to flush_data
FlushMemType to flush_mem_type
========================================

Signed-off-by: default avatarRene Sapiens <rene.sapiens@ti.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 0d9073ab

drivers/staging/tidspbridge/core/chnl_sm.c

+14 −14
Original line number Diff line number Diff line
@@ -479,7 +479,7 @@ int bridge_chnl_destroy(struct chnl_mgr *hchnl_mgr) 
 *  purpose:

 *      Flushes all the outstanding data requests on a channel.

 */

int bridge_chnl_flush_io(struct chnl_object *chnl_obj, u32 dwTimeOut)

int bridge_chnl_flush_io(struct chnl_object *chnl_obj, u32 timeout)

{

	int status = 0;

	struct chnl_object *pchnl = (struct chnl_object *)chnl_obj;
@@ -488,7 +488,7 @@ int bridge_chnl_flush_io(struct chnl_object *chnl_obj, u32 dwTimeOut) 
	struct chnl_ioc chnl_ioc_obj;

	/* Check args: */

	if (pchnl) {

		if ((dwTimeOut == CHNL_IOCNOWAIT)

		if ((timeout == CHNL_IOCNOWAIT)

		    && CHNL_IS_OUTPUT(pchnl->chnl_mode)) {

			status = -EINVAL;

		} else {
@@ -509,7 +509,7 @@ int bridge_chnl_flush_io(struct chnl_object *chnl_obj, u32 dwTimeOut) 
			while (!LST_IS_EMPTY(pchnl->pio_requests) &&

			       DSP_SUCCEEDED(status)) {

				status = bridge_chnl_get_ioc(chnl_obj,

						dwTimeOut, &chnl_ioc_obj);

						timeout, &chnl_ioc_obj);

				if (DSP_FAILED(status))

					continue;
@@ -566,7 +566,7 @@ int bridge_chnl_get_info(struct chnl_object *chnl_obj, 
 *      I/O request.

 *      Note: Ensures Channel Invariant (see notes above).

 */

int bridge_chnl_get_ioc(struct chnl_object *chnl_obj, u32 dwTimeOut,

int bridge_chnl_get_ioc(struct chnl_object *chnl_obj, u32 timeout,

			    OUT struct chnl_ioc *pIOC)

{

	int status = 0;
@@ -582,7 +582,7 @@ int bridge_chnl_get_ioc(struct chnl_object *chnl_obj, u32 dwTimeOut, 
	/* Check args: */

	if (!pIOC || !pchnl) {

		status = -EFAULT;

	} else if (dwTimeOut == CHNL_IOCNOWAIT) {

	} else if (timeout == CHNL_IOCNOWAIT) {

		if (LST_IS_EMPTY(pchnl->pio_completions))

			status = -EREMOTEIO;
@@ -597,12 +597,12 @@ int bridge_chnl_get_ioc(struct chnl_object *chnl_obj, u32 dwTimeOut, 
		goto func_end;



	ioc.status = CHNL_IOCSTATCOMPLETE;

	if (dwTimeOut !=

	if (timeout !=

	    CHNL_IOCNOWAIT && LST_IS_EMPTY(pchnl->pio_completions)) {

		if (dwTimeOut == CHNL_IOCINFINITE)

			dwTimeOut = SYNC_INFINITE;

		if (timeout == CHNL_IOCINFINITE)

			timeout = SYNC_INFINITE;



		stat_sync = sync_wait_on_event(pchnl->sync_event, dwTimeOut);

		stat_sync = sync_wait_on_event(pchnl->sync_event, timeout);

		if (stat_sync == -ETIME) {

			/* No response from DSP */

			ioc.status |= CHNL_IOCSTATTIMEOUT;
@@ -663,7 +663,7 @@ int bridge_chnl_get_ioc(struct chnl_object *chnl_obj, u32 dwTimeOut, 
		 *  value may be non-zero, we still have to set the event.

		 *  Therefore, this optimization is taken out.

		 *

		 *  if (dwTimeOut == CHNL_IOCNOWAIT) {

		 *  if (timeout == CHNL_IOCNOWAIT) {

		 *    ... ensure event is set..

		 *      sync_set_event(pchnl->sync_event);

		 *  } */
@@ -744,8 +744,8 @@ int bridge_chnl_get_mgr_info(struct chnl_mgr *hchnl_mgr, u32 uChnlID, 
 *  ======== bridge_chnl_idle ========

 *      Idles a particular channel.

 */

int bridge_chnl_idle(struct chnl_object *chnl_obj, u32 dwTimeOut,

			    bool fFlush)

int bridge_chnl_idle(struct chnl_object *chnl_obj, u32 timeout,

			    bool flush_data)

{

	s8 chnl_mode;

	struct chnl_mgr *chnl_mgr_obj;
@@ -756,9 +756,9 @@ int bridge_chnl_idle(struct chnl_object *chnl_obj, u32 dwTimeOut, 
	chnl_mode = chnl_obj->chnl_mode;

	chnl_mgr_obj = chnl_obj->chnl_mgr_obj;



	if (CHNL_IS_OUTPUT(chnl_mode) && !fFlush) {

	if (CHNL_IS_OUTPUT(chnl_mode) && !flush_data) {

		/* Wait for IO completions, up to the specified timeout: */

		status = bridge_chnl_flush_io(chnl_obj, dwTimeOut);

		status = bridge_chnl_flush_io(chnl_obj, timeout);

	} else {

		status = bridge_chnl_cancel_io(chnl_obj);

drivers/staging/tidspbridge/core/io_sm.c

+4 −4
Original line number Diff line number Diff line
@@ -146,7 +146,7 @@ static void output_chnl(struct io_mgr *pio_mgr, struct chnl_object *pchnl, 
static void input_msg(struct io_mgr *pio_mgr, struct msg_mgr *hmsg_mgr);

static void output_msg(struct io_mgr *pio_mgr, struct msg_mgr *hmsg_mgr);

static u32 find_ready_output(struct chnl_mgr *chnl_mgr_obj,

			     struct chnl_object *pchnl, u32 dwMask);

			     struct chnl_object *pchnl, u32 mask);

static u32 read_data(struct bridge_dev_context *hDevContext, void *dest,

		     void *pSrc, u32 usize);

static u32 write_data(struct bridge_dev_context *hDevContext, void *dest,
@@ -1081,7 +1081,7 @@ void iosm_schedule(struct io_mgr *pio_mgr) 
 *      IO_Dispatch()), so just start searching from the current channel id.

 */

static u32 find_ready_output(struct chnl_mgr *chnl_mgr_obj,

			     struct chnl_object *pchnl, u32 dwMask)

			     struct chnl_object *pchnl, u32 mask)

{

	u32 ret = OUTPUTNOTREADY;

	u32 id, start_id;
@@ -1092,11 +1092,11 @@ static u32 find_ready_output(struct chnl_mgr *chnl_mgr_obj, 
	id = ((id == CHNL_MAXCHANNELS) ? 0 : id);

	if (id >= CHNL_MAXCHANNELS)

		goto func_end;

	if (dwMask) {

	if (mask) {

		shift = (1 << id);

		start_id = id;

		do {

			if (dwMask & shift) {

			if (mask & shift) {

				ret = id;

				if (pchnl == NULL)

					chnl_mgr_obj->dw_last_output = id;

drivers/staging/tidspbridge/core/tiomap3430.c

+22 −22
Original line number Diff line number Diff line
@@ -77,16 +77,16 @@ 
static int bridge_brd_monitor(struct bridge_dev_context *dev_context);

static int bridge_brd_read(struct bridge_dev_context *dev_context,

				  OUT u8 *pbHostBuf,

				  u32 dwDSPAddr, u32 ul_num_bytes,

				  u32 dsp_addr, u32 ul_num_bytes,

				  u32 ulMemType);

static int bridge_brd_start(struct bridge_dev_context *dev_context,

				   u32 dwDSPAddr);

				   u32 dsp_addr);

static int bridge_brd_status(struct bridge_dev_context *dev_context,

				    int *pdwState);

static int bridge_brd_stop(struct bridge_dev_context *dev_context);

static int bridge_brd_write(struct bridge_dev_context *dev_context,

				   IN u8 *pbHostBuf,

				   u32 dwDSPAddr, u32 ul_num_bytes,

				   u32 dsp_addr, u32 ul_num_bytes,

				   u32 ulMemType);

static int bridge_brd_set_state(struct bridge_dev_context *hDevContext,

				    u32 ulBrdState);
@@ -94,7 +94,7 @@ static int bridge_brd_mem_copy(struct bridge_dev_context *hDevContext, 
				   u32 ulDspDestAddr, u32 ulDspSrcAddr,

				   u32 ul_num_bytes, u32 ulMemType);

static int bridge_brd_mem_write(struct bridge_dev_context *dev_context,

				    IN u8 *pbHostBuf, u32 dwDSPAddr,

				    IN u8 *pbHostBuf, u32 dsp_addr,

				    u32 ul_num_bytes, u32 ulMemType);

static int bridge_brd_mem_map(struct bridge_dev_context *hDevContext,

				  u32 ul_mpu_addr, u32 ulVirtAddr,
@@ -304,7 +304,7 @@ static int bridge_brd_monitor(struct bridge_dev_context *hDevContext) 
 *      Reads buffers for DSP memory.

 */

static int bridge_brd_read(struct bridge_dev_context *hDevContext,

				  OUT u8 *pbHostBuf, u32 dwDSPAddr,

				  OUT u8 *pbHostBuf, u32 dsp_addr,

				  u32 ul_num_bytes, u32 ulMemType)

{

	int status = 0;
@@ -312,16 +312,16 @@ static int bridge_brd_read(struct bridge_dev_context *hDevContext, 
	u32 offset;

	u32 dsp_base_addr = hDevContext->dw_dsp_base_addr;



	if (dwDSPAddr < dev_context->dw_dsp_start_add) {

	if (dsp_addr < dev_context->dw_dsp_start_add) {

		status = -EPERM;

		return status;

	}

	/* change here to account for the 3 bands of the DSP internal memory */

	if ((dwDSPAddr - dev_context->dw_dsp_start_add) <

	if ((dsp_addr - dev_context->dw_dsp_start_add) <

	    dev_context->dw_internal_size) {

		offset = dwDSPAddr - dev_context->dw_dsp_start_add;

		offset = dsp_addr - dev_context->dw_dsp_start_add;

	} else {

		status = read_ext_dsp_data(dev_context, pbHostBuf, dwDSPAddr,

		status = read_ext_dsp_data(dev_context, pbHostBuf, dsp_addr,

					   ul_num_bytes, ulMemType);

		return status;

	}
@@ -356,7 +356,7 @@ static int bridge_brd_set_state(struct bridge_dev_context *hDevContext, 
 *  b) DSP_RST2 is released.

 */

static int bridge_brd_start(struct bridge_dev_context *hDevContext,

				   u32 dwDSPAddr)

				   u32 dsp_addr)

{

	int status = 0;

	struct bridge_dev_context *dev_context = hDevContext;
@@ -417,7 +417,7 @@ static int bridge_brd_start(struct bridge_dev_context *hDevContext, 
					OMAP3430_RST1_IVA2_MASK, OMAP3430_IVA2_MOD,

					OMAP2_RM_RSTCTRL);

			/* Mask address with 1K for compatibility */

			__raw_writel(dwDSPAddr & OMAP3_IVA2_BOOTADDR_MASK,

			__raw_writel(dsp_addr & OMAP3_IVA2_BOOTADDR_MASK,

					OMAP343X_CTRL_REGADDR(

					OMAP343X_CONTROL_IVA2_BOOTADDR));

			/*
@@ -588,7 +588,7 @@ static int bridge_brd_start(struct bridge_dev_context *hDevContext, 
					OMAP3430_IVA2_MOD, OMAP2_RM_RSTCTRL);



		dev_dbg(bridge, "Waiting for Sync @ 0x%x\n", dw_sync_addr);

		dev_dbg(bridge, "DSP c_int00 Address =  0x%x\n", dwDSPAddr);

		dev_dbg(bridge, "DSP c_int00 Address =  0x%x\n", dsp_addr);

		if (dsp_debug)

			while (*((volatile u16 *)dw_sync_addr))

				;;
@@ -765,22 +765,22 @@ static int bridge_brd_status(struct bridge_dev_context *hDevContext, 
 *      Copies the buffers to DSP internal or external memory.

 */

static int bridge_brd_write(struct bridge_dev_context *hDevContext,

				   IN u8 *pbHostBuf, u32 dwDSPAddr,

				   IN u8 *pbHostBuf, u32 dsp_addr,

				   u32 ul_num_bytes, u32 ulMemType)

{

	int status = 0;

	struct bridge_dev_context *dev_context = hDevContext;



	if (dwDSPAddr < dev_context->dw_dsp_start_add) {

	if (dsp_addr < dev_context->dw_dsp_start_add) {

		status = -EPERM;

		return status;

	}

	if ((dwDSPAddr - dev_context->dw_dsp_start_add) <

	if ((dsp_addr - dev_context->dw_dsp_start_add) <

	    dev_context->dw_internal_size) {

		status = write_dsp_data(hDevContext, pbHostBuf, dwDSPAddr,

		status = write_dsp_data(hDevContext, pbHostBuf, dsp_addr,

					ul_num_bytes, ulMemType);

	} else {

		status = write_ext_dsp_data(dev_context, pbHostBuf, dwDSPAddr,

		status = write_ext_dsp_data(dev_context, pbHostBuf, dsp_addr,

					    ul_num_bytes, ulMemType, false);

	}
@@ -1147,7 +1147,7 @@ static int bridge_brd_mem_copy(struct bridge_dev_context *hDevContext, 


/* Mem Write does not halt the DSP to write unlike bridge_brd_write */

static int bridge_brd_mem_write(struct bridge_dev_context *hDevContext,

				    IN u8 *pbHostBuf, u32 dwDSPAddr,

				    IN u8 *pbHostBuf, u32 dsp_addr,

				    u32 ul_num_bytes, u32 ulMemType)

{

	int status = 0;
@@ -1158,18 +1158,18 @@ static int bridge_brd_mem_write(struct bridge_dev_context *hDevContext, 
	while (ul_remain_bytes > 0 && DSP_SUCCEEDED(status)) {

		ul_bytes =

		    ul_remain_bytes > BUFFERSIZE ? BUFFERSIZE : ul_remain_bytes;

		if (dwDSPAddr < (dev_context->dw_dsp_start_add +

		if (dsp_addr < (dev_context->dw_dsp_start_add +

				 dev_context->dw_internal_size)) {

			status =

			    write_dsp_data(hDevContext, pbHostBuf, dwDSPAddr,

			    write_dsp_data(hDevContext, pbHostBuf, dsp_addr,

					   ul_bytes, ulMemType);

		} else {

			status = write_ext_dsp_data(hDevContext, pbHostBuf,

						    dwDSPAddr, ul_bytes,

						    dsp_addr, ul_bytes,

						    ulMemType, true);

		}

		ul_remain_bytes -= ul_bytes;

		dwDSPAddr += ul_bytes;

		dsp_addr += ul_bytes;

		pbHostBuf = pbHostBuf + ul_bytes;

	}

	return status;

drivers/staging/tidspbridge/core/tiomap_io.c

+12 −12
Original line number Diff line number Diff line
@@ -51,7 +51,7 @@ bool symbols_reloaded = true; 
 *      Copies DSP external memory buffers to the host side buffers.

 */

int read_ext_dsp_data(struct bridge_dev_context *hDevContext,

			     OUT u8 *pbHostBuf, u32 dwDSPAddr,

			     OUT u8 *pbHostBuf, u32 dsp_addr,

			     u32 ul_num_bytes, u32 ulMemType)

{

	int status = 0;
@@ -83,8 +83,8 @@ int read_ext_dsp_data(struct bridge_dev_context *hDevContext, 
	DBC_ASSERT(ul_trace_sec_end != 0);



	if (DSP_SUCCEEDED(status)) {

		if ((dwDSPAddr <= ul_trace_sec_end) &&

		    (dwDSPAddr >= ul_trace_sec_beg))

		if ((dsp_addr <= ul_trace_sec_end) &&

		    (dsp_addr >= ul_trace_sec_beg))

			trace_read = true;

	}
@@ -165,7 +165,7 @@ int read_ext_dsp_data(struct bridge_dev_context *hDevContext, 
	if (!dw_base_addr || !ul_ext_base || !ul_ext_end)

		status = -EPERM;



	offset = dwDSPAddr - ul_ext_base;

	offset = dsp_addr - ul_ext_base;



	if (DSP_SUCCEEDED(status))

		memcpy(pbHostBuf, (u8 *) dw_base_addr + offset, ul_num_bytes);
@@ -179,7 +179,7 @@ int read_ext_dsp_data(struct bridge_dev_context *hDevContext, 
 *      Copies buffers to the DSP internal/external memory.

 */

int write_dsp_data(struct bridge_dev_context *hDevContext,

			  IN u8 *pbHostBuf, u32 dwDSPAddr, u32 ul_num_bytes,

			  IN u8 *pbHostBuf, u32 dsp_addr, u32 ul_num_bytes,

			  u32 ulMemType)

{

	u32 offset;
@@ -194,7 +194,7 @@ int write_dsp_data(struct bridge_dev_context *hDevContext, 
	if (!resources)

		return -EPERM;



	offset = dwDSPAddr - hDevContext->dw_dsp_start_add;

	offset = dsp_addr - hDevContext->dw_dsp_start_add;

	if (offset < base1) {

		dw_base_addr = MEM_LINEAR_ADDRESS(resources->dw_mem_base[2],

						  resources->dw_mem_length[2]);
@@ -225,7 +225,7 @@ int write_dsp_data(struct bridge_dev_context *hDevContext, 
 *

 */

int write_ext_dsp_data(struct bridge_dev_context *dev_context,

			      IN u8 *pbHostBuf, u32 dwDSPAddr,

			      IN u8 *pbHostBuf, u32 dsp_addr,

			      u32 ul_num_bytes, u32 ulMemType,

			      bool dynamic_load)

{
@@ -253,8 +253,8 @@ int write_ext_dsp_data(struct bridge_dev_context *dev_context, 
					     &ul_trace_sec_end);

	}

	if (DSP_SUCCEEDED(ret)) {

		if ((dwDSPAddr <= ul_trace_sec_end) &&

		    (dwDSPAddr >= ul_trace_sec_beg))

		if ((dsp_addr <= ul_trace_sec_end) &&

		    (dsp_addr >= ul_trace_sec_beg))

			trace_load = true;

	}
@@ -364,9 +364,9 @@ int write_ext_dsp_data(struct bridge_dev_context *dev_context, 
		for (i = 0; i < 4; i++)

			remain_byte[i] = 0x0;



		dw_offset = dwDSPAddr - ul_ext_base;

		/* Also make sure the dwDSPAddr is < ul_ext_end */

		if (dwDSPAddr > ul_ext_end || dw_offset > dwDSPAddr)

		dw_offset = dsp_addr - ul_ext_base;

		/* Also make sure the dsp_addr is < ul_ext_end */

		if (dsp_addr > ul_ext_end || dw_offset > dsp_addr)

			ret = -EPERM;

	}

	if (DSP_SUCCEEDED(ret)) {

drivers/staging/tidspbridge/core/tiomap_io.h

+7 −7
Original line number Diff line number Diff line
@@ -48,14 +48,14 @@ 
 * is configured by the combination of DSP MMU and shm Memory manager in the CDB

 */

extern int read_ext_dsp_data(struct bridge_dev_context *dev_context,

				    OUT u8 *pbHostBuf, u32 dwDSPAddr,

				    OUT u8 *pbHostBuf, u32 dsp_addr,

				    u32 ul_num_bytes, u32 ulMemType);



/*

 *  ======== write_dsp_data ========

 */

extern int write_dsp_data(struct bridge_dev_context *dev_context,

				 OUT u8 *pbHostBuf, u32 dwDSPAddr,

				 OUT u8 *pbHostBuf, u32 dsp_addr,

				 u32 ul_num_bytes, u32 ulMemType);



/*
@@ -65,7 +65,7 @@ extern int write_dsp_data(struct bridge_dev_context *dev_context, 
 *  shm Memory manager in the CDB

 */

extern int write_ext_dsp_data(struct bridge_dev_context *dev_context,

				     IN u8 *pbHostBuf, u32 dwDSPAddr,

				     IN u8 *pbHostBuf, u32 dsp_addr,

				     u32 ul_num_bytes, u32 ulMemType,

				     bool dynamic_load);
@@ -75,9 +75,9 @@ extern int write_ext_dsp_data(struct bridge_dev_context *dev_context, 
 */

extern inline void write_ext32_bit_dsp_data(IN const

					struct bridge_dev_context *dev_context,

					IN u32 dwDSPAddr, IN u32 val)

					IN u32 dsp_addr, IN u32 val)

{

	*(u32 *) dwDSPAddr = ((dev_context->tc_word_swap_on) ? (((val << 16) &

	*(u32 *) dsp_addr = ((dev_context->tc_word_swap_on) ? (((val << 16) &

								 0xFFFF0000) |

								((val >> 16) &

								 0x0000FFFF)) :
@@ -89,10 +89,10 @@ extern inline void write_ext32_bit_dsp_data(IN const 
 * Reads 32 bit data from the external memory

 */

extern inline u32 read_ext32_bit_dsp_data(IN const struct bridge_dev_context

					  *dev_context, IN u32 dwDSPAddr)

					  *dev_context, IN u32 dsp_addr)

{

	u32 ret;

	ret = *(u32 *) dwDSPAddr;

	ret = *(u32 *) dsp_addr;



	ret = ((dev_context->tc_word_swap_on) ? (((ret << 16)

						  & 0xFFFF0000) | ((ret >> 16) &