Unverified Commit b0eea634 authored by Michael Walle's avatar Michael Walle Committed by Tudor Ambarus
Browse files

mtd: spi-nor: macronix: sort flash_info database 



The flash ID is the new primary key into our database. Sort the entry by
it. Keep the most specific ones first, because there might be ID
collisions between shorter and longer ones.

Signed-off-by: default avatarMichael Walle <mwalle@kernel.org>
Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-35-e60548861b10@kernel.org


Signed-off-by: default avatarTudor Ambarus <tudor.ambarus@linaro.org>
parent 947bb8f2

drivers/mtd/spi-nor/macronix.c

+65 −65
Original line number Diff line number Diff line
@@ -62,26 +62,44 @@ static const struct flash_info macronix_nor_parts[] = { 
		.name = "mx25l3205d",

		.size = SZ_4M,

		.no_sfdp_flags = SECT_4K,

	}, {

		.id = SNOR_ID(0xc2, 0x9e, 0x16),

		.name = "mx25l3255e",

		.size = SZ_4M,

		.no_sfdp_flags = SECT_4K,

	}, {

		.id = SNOR_ID(0xc2, 0x20, 0x17),

		.name = "mx25l6405d",

		.size = SZ_8M,

		.no_sfdp_flags = SECT_4K,

	}, {

		.id = SNOR_ID(0xc2, 0x20, 0x18),

		.name = "mx25l12805d",

		.size = SZ_16M,

		.flags = SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP,

		.no_sfdp_flags = SECT_4K,

	}, {

		.id = SNOR_ID(0xc2, 0x20, 0x19),

		.name = "mx25l25635e",

		.size = SZ_32M,

		.no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,

		.fixups = &mx25l25635_fixups

	}, {

		.id = SNOR_ID(0xc2, 0x20, 0x1a),

		.name = "mx66l51235f",

		.size = SZ_64M,

		.no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,

		.fixup_flags = SPI_NOR_4B_OPCODES,

	}, {

		.id = SNOR_ID(0xc2, 0x20, 0x1b),

		.name = "mx66l1g45g",

		.size = SZ_128M,

		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,

	}, {

		.id = SNOR_ID(0xc2, 0x23, 0x14),

		.name = "mx25v8035f",

		.size = SZ_1M,

		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,

	}, {

		.id = SNOR_ID(0xc2, 0x25, 0x32),

		.name = "mx25u2033e",

		.size = SZ_256K,

		.no_sfdp_flags = SECT_4K,

	}, {

		.id = SNOR_ID(0xc2, 0x25, 0x36),

		.name = "mx25u3235f",

		.size = SZ_4M,

		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,

	}, {

		.id = SNOR_ID(0xc2, 0x25, 0x33),

		.name = "mx25u4035",
@@ -92,74 +110,33 @@ static const struct flash_info macronix_nor_parts[] = { 
		.name = "mx25u8035",

		.size = SZ_1M,

		.no_sfdp_flags = SECT_4K,

	}, {

		.id = SNOR_ID(0xc2, 0x25, 0x36),

		.name = "mx25u3235f",

		.size = SZ_4M,

		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,

	}, {

		.id = SNOR_ID(0xc2, 0x25, 0x37),

		.name = "mx25u6435f",

		.size = SZ_8M,

		.no_sfdp_flags = SECT_4K,

	}, {

		.id = SNOR_ID(0xc2, 0x20, 0x18),

		.name = "mx25l12805d",

		.size = SZ_16M,

		.flags = SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP,

		.no_sfdp_flags = SECT_4K,

	}, {

		.id = SNOR_ID(0xc2, 0x26, 0x18),

		.name = "mx25l12855e",

		.size = SZ_16M,

	}, {

		.id = SNOR_ID(0xc2, 0x28, 0x15),

		.name = "mx25r1635f",

		.size = SZ_2M,

		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,

	}, {

		.id = SNOR_ID(0xc2, 0x28, 0x16),

		.name = "mx25r3235f",

		.size = SZ_4M,

		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,

	}, {

		.id = SNOR_ID(0xc2, 0x25, 0x38),

		.name = "mx25u12835f",

		.size = SZ_16M,

		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,

	}, {

		.id = SNOR_ID(0xc2, 0x20, 0x19),

		.name = "mx25l25635e",

		.size = SZ_32M,

		.no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,

		.fixups = &mx25l25635_fixups

	}, {

		.id = SNOR_ID(0xc2, 0x25, 0x39),

		.name = "mx25u25635f",

		.size = SZ_32M,

		.no_sfdp_flags = SECT_4K,

		FIXUP_FLAGS(SPI_NOR_4B_OPCODES)

		.fixup_flags = SPI_NOR_4B_OPCODES,

	}, {

		.id = SNOR_ID(0xc2, 0x25, 0x3a),

		.name = "mx25u51245g",

		.size = SZ_64M,

		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,

		.fixup_flags = SPI_NOR_4B_OPCODES,

	}, {

		.id = SNOR_ID(0xc2, 0x81, 0x3a),

		.name = "mx25uw51245g",

		.n_banks = 4,

		.flags = SPI_NOR_RWW,

	}, {

		.id = SNOR_ID(0xc2, 0x23, 0x14),

		.name = "mx25v8035f",

		.size = SZ_1M,

		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,

	}, {

		.id = SNOR_ID(0xc2, 0x26, 0x19),

		.name = "mx25l25655e",

		.size = SZ_32M,

	}, {

		.id = SNOR_ID(0xc2, 0x20, 0x1a),

		.name = "mx66l51235f",

		.size = SZ_64M,

		.no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,

		.fixup_flags = SPI_NOR_4B_OPCODES,

	}, {

		.id = SNOR_ID(0xc2, 0x25, 0x3a),

		.name = "mx66u51235f",
@@ -167,22 +144,45 @@ static const struct flash_info macronix_nor_parts[] = { 
		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,

		.fixup_flags = SPI_NOR_4B_OPCODES,

	}, {

		.id = SNOR_ID(0xc2, 0x20, 0x1b),

		.name = "mx66l1g45g",

		.size = SZ_128M,

		.id = SNOR_ID(0xc2, 0x25, 0x3c),

		.name = "mx66u2g45g",

		.size = SZ_256M,

		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,

		.fixup_flags = SPI_NOR_4B_OPCODES,

	}, {

		.id = SNOR_ID(0xc2, 0x26, 0x18),

		.name = "mx25l12855e",

		.size = SZ_16M,

	}, {

		.id = SNOR_ID(0xc2, 0x26, 0x19),

		.name = "mx25l25655e",

		.size = SZ_32M,

	}, {

		.id = SNOR_ID(0xc2, 0x26, 0x1b),

		.name = "mx66l1g55g",

		.size = SZ_128M,

		.no_sfdp_flags = SPI_NOR_QUAD_READ,

	}, {

		.id = SNOR_ID(0xc2, 0x25, 0x3c),

		.name = "mx66u2g45g",

		.size = SZ_256M,

		.id = SNOR_ID(0xc2, 0x28, 0x15),

		.name = "mx25r1635f",

		.size = SZ_2M,

		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,

		.fixup_flags = SPI_NOR_4B_OPCODES,

	},

	}, {

		.id = SNOR_ID(0xc2, 0x28, 0x16),

		.name = "mx25r3235f",

		.size = SZ_4M,

		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,

	}, {

		.id = SNOR_ID(0xc2, 0x81, 0x3a),

		.name = "mx25uw51245g",

		.n_banks = 4,

		.flags = SPI_NOR_RWW,

	}, {

		.id = SNOR_ID(0xc2, 0x9e, 0x16),

		.name = "mx25l3255e",

		.size = SZ_4M,

		.no_sfdp_flags = SECT_4K,

	}

};



static void macronix_nor_default_init(struct spi_nor *nor)