Commit af264d02 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/pp: Refine code in powerplay for Cz/Vega10 



Add dpm check functions on CZ/Vega10 to smu backend
function table.

Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d246cd53

drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c

+2 −25
Original line number Diff line number Diff line
@@ -1009,32 +1009,9 @@ static void cz_reset_acp_boot_level(struct pp_hwmgr *hwmgr) 
	cz_hwmgr->acp_boot_level = 0xff;

}



static bool cz_dpm_check_smu_features(struct pp_hwmgr *hwmgr,

				unsigned long check_feature)

{

	int result;

	unsigned long features;



	result = smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GetFeatureStatus, 0);

	if (result == 0) {

		features = smum_get_argument(hwmgr);

		if (features & check_feature)

			return true;

	}



	return false;

}



static bool cz_check_for_dpm_enabled(struct pp_hwmgr *hwmgr)

{

	if (cz_dpm_check_smu_features(hwmgr, SMU_EnabledFeatureScoreboard_SclkDpmOn))

		return true;

	return false;

}



static int cz_disable_dpm_tasks(struct pp_hwmgr *hwmgr)

{

	if (!cz_check_for_dpm_enabled(hwmgr)) {

	if (!smum_is_dpm_running(hwmgr)) {

		pr_info("dpm has been disabled\n");

		return 0;

	}
@@ -1049,7 +1026,7 @@ static int cz_disable_dpm_tasks(struct pp_hwmgr *hwmgr) 


static int cz_enable_dpm_tasks(struct pp_hwmgr *hwmgr)

{

	if (cz_check_for_dpm_enabled(hwmgr)) {

	if (smum_is_dpm_running(hwmgr)) {

		pr_info("dpm has been enabled\n");

		return 0;

	}

drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.h

+0 −1
Original line number Diff line number Diff line
@@ -171,7 +171,6 @@ struct cz_power_state { 
#define DPMFlags_Debug				0x80000000



#define SMU_EnabledFeatureScoreboard_AcpDpmOn   0x00000001 /* bit 0 */

#define SMU_EnabledFeatureScoreboard_SclkDpmOn    0x00200000

#define SMU_EnabledFeatureScoreboard_UvdDpmOn   0x00800000 /* bit 23 */

#define SMU_EnabledFeatureScoreboard_VceDpmOn   0x01000000 /* bit 24 */

drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

+2 −13
Original line number Diff line number Diff line
@@ -931,17 +931,6 @@ static int vega10_setup_asic_task(struct pp_hwmgr *hwmgr) 
	return 0;

}



static bool vega10_is_dpm_running(struct pp_hwmgr *hwmgr)

{

	uint32_t features_enabled;



	if (!vega10_get_smc_features(hwmgr, &features_enabled)) {

		if (features_enabled & SMC_DPM_FEATURES)

			return true;

	}

	return false;

}



/**

* Remove repeated voltage values and create table with unique values.

*
@@ -2874,7 +2863,7 @@ static int vega10_enable_dpm_tasks(struct pp_hwmgr *hwmgr) 
	smum_send_msg_to_smc_with_parameter(hwmgr,

			PPSMC_MSG_NumOfDisplays, 0);



	tmp_result = (!vega10_is_dpm_running(hwmgr)) ? 0 : -1;

	tmp_result = (!smum_is_dpm_running(hwmgr)) ? 0 : -1;

	PP_ASSERT_WITH_CODE(!tmp_result,

			"DPM is already running right , skipping re-enablement!",

			return 0);
@@ -4699,7 +4688,7 @@ static int vega10_disable_dpm_tasks(struct pp_hwmgr *hwmgr) 
{

	int tmp_result, result = 0;



	tmp_result = (vega10_is_dpm_running(hwmgr)) ? 0 : -1;

	tmp_result = (smum_is_dpm_running(hwmgr)) ? 0 : -1;

	PP_ASSERT_WITH_CODE(tmp_result == 0,

			"DPM is not running right now, no need to disable DPM!",

			return 0);

drivers/gpu/drm/amd/powerplay/smumgr/cz_smumgr.c

+24 −0
Original line number Diff line number Diff line
@@ -855,6 +855,29 @@ static int cz_smu_fini(struct pp_hwmgr *hwmgr) 
	return 0;

}



static bool cz_dpm_check_smu_features(struct pp_hwmgr *hwmgr,

				unsigned long check_feature)

{

	int result;

	unsigned long features;



	result = cz_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GetFeatureStatus, 0);

	if (result == 0) {

		features = smum_get_argument(hwmgr);

		if (features & check_feature)

			return true;

	}



	return false;

}



static bool cz_is_dpm_running(struct pp_hwmgr *hwmgr)

{

	if (cz_dpm_check_smu_features(hwmgr, SMU_EnabledFeatureScoreboard_SclkDpmOn))

		return true;

	return false;

}



const struct pp_smumgr_func cz_smu_funcs = {

	.smu_init = cz_smu_init,

	.smu_fini = cz_smu_fini,
@@ -867,5 +890,6 @@ const struct pp_smumgr_func cz_smu_funcs = { 
	.send_msg_to_smc_with_parameter = cz_send_msg_to_smc_with_parameter,

	.download_pptable_settings = cz_download_pptable_settings,

	.upload_pptable_settings = cz_upload_pptable_settings,

	.is_dpm_running = cz_is_dpm_running,

};

drivers/gpu/drm/amd/powerplay/smumgr/cz_smumgr.h

+2 −0
Original line number Diff line number Diff line
@@ -31,6 +31,8 @@ 
#define CZ_SCRATCH_SIZE_SDMA_METADATA           1024

#define CZ_SCRATCH_SIZE_IH                      ((2*256+1)*4)



#define SMU_EnabledFeatureScoreboard_SclkDpmOn    0x00200000



enum cz_scratch_entry {

	CZ_SCRATCH_ENTRY_UCODE_ID_SDMA0 = 0,

	CZ_SCRATCH_ENTRY_UCODE_ID_SDMA1,