Commit ae500b35 authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam Committed by Bjorn Andersson
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ARM: dts: qcom: sdx55: Fix the IRQ trigger type for UART 



The trigger type should be LEVEL_HIGH. So fix it!

Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220530080842.37024-2-manivannan.sadhasivam@linaro.org
parent ab148901

arch/arm/boot/dts/qcom-sdx55.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -206,7 +206,7 @@ gcc: clock-controller@100000 { 
		blsp1_uart3: serial@831000 {

			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";

			reg = <0x00831000 0x200>;

			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_LOW>;

			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&gcc 30>,

				 <&gcc 9>;

			clock-names = "core", "iface";