Commit ae245cde authored by Sujith Manoharan's avatar Sujith Manoharan Committed by John W. Linville
Browse files

ath9k: Initialize NF values properly 



Using AR_SREV_* macros for setting up the chip-specific NF
values will make adding support for new chips hard. Use separate
macros for each chip. Currently, AR9462 has the same value for
all NF limits.

Signed-off-by: default avatarSujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 4bc7cda8

drivers/net/wireless/ath/ath9k/ar9003_phy.c

+11 −4
Original line number Diff line number Diff line
@@ -1099,13 +1099,20 @@ static void ar9003_hw_set_nf_limits(struct ath_hw *ah) 
{

	ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9300_2GHZ;

	ah->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_9300_2GHZ;

	if (AR_SREV_9330(ah))

		ah->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9330_2GHZ;

	else

	ah->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9300_2GHZ;

	ah->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_9300_5GHZ;

	ah->nf_5g.min = AR_PHY_CCA_MIN_GOOD_VAL_9300_5GHZ;

	ah->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_9300_5GHZ;



	if (AR_SREV_9330(ah))

		ah->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9330_2GHZ;



	if (AR_SREV_9462(ah)) {

		ah->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_9462_2GHZ;

		ah->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9462_2GHZ;

		ah->nf_5g.min = AR_PHY_CCA_MIN_GOOD_VAL_9462_5GHZ;

		ah->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_9462_5GHZ;

	}

}



/*

drivers/net/wireless/ath/ath9k/ar9003_phy.h

+9 −4
Original line number Diff line number Diff line
@@ -325,13 +325,18 @@ 


#define AR_PHY_RX_OCGAIN        (AR_AGC_BASE + 0x200)



#define AR_PHY_CCA_NOM_VAL_9300_2GHZ          (AR_SREV_9462(ah) ? -127 : -110)

#define AR_PHY_CCA_NOM_VAL_9300_5GHZ          (AR_SREV_9462(ah) ? -127 : -115)

#define AR_PHY_CCA_MIN_GOOD_VAL_9300_2GHZ     (AR_SREV_9462(ah) ? -127 : -125)

#define AR_PHY_CCA_MIN_GOOD_VAL_9300_5GHZ     (AR_SREV_9462(ah) ? -127 : -125)

#define AR_PHY_CCA_NOM_VAL_9300_2GHZ          -110

#define AR_PHY_CCA_NOM_VAL_9300_5GHZ          -115

#define AR_PHY_CCA_MIN_GOOD_VAL_9300_2GHZ     -125

#define AR_PHY_CCA_MIN_GOOD_VAL_9300_5GHZ     -125

#define AR_PHY_CCA_MAX_GOOD_VAL_9300_2GHZ     -95

#define AR_PHY_CCA_MAX_GOOD_VAL_9300_5GHZ     -100



#define AR_PHY_CCA_NOM_VAL_9462_2GHZ          -127

#define AR_PHY_CCA_MIN_GOOD_VAL_9462_2GHZ     -127

#define AR_PHY_CCA_NOM_VAL_9462_5GHZ          -127

#define AR_PHY_CCA_MIN_GOOD_VAL_9462_5GHZ     -127



#define AR_PHY_CCA_NOM_VAL_9330_2GHZ          -118



/*