Commit ad46ad2d authored by Paul Gortmaker's avatar Paul Gortmaker Committed by Michael Ellerman
Browse files

powerpc: drop MPC8272-ADS and PowerQUICC II FADS shared code. 



With the two platforms depending on this shared code, and no others,
we can remove the orphaned code and Kconfigs

Signed-off-by: default avatarPaul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20230224204959.17425-4-paul.gortmaker@windriver.com
parent 859b21a0

arch/powerpc/include/asm/mpc8260.h

+0 −4
Original line number Diff line number Diff line
@@ -13,10 +13,6 @@ 


#ifdef CONFIG_8260



#if defined(CONFIG_PQ2ADS) || defined (CONFIG_PQ2FADS)

#include <platforms/82xx/pq2ads.h>

#endif



#ifdef CONFIG_PCI_8260

#include <platforms/82xx/m82xx_pci.h>

#endif

arch/powerpc/platforms/82xx/Kconfig

+0 −6
Original line number Diff line number Diff line
@@ -28,9 +28,6 @@ config MGCOGE 


endif



config PQ2ADS

	bool



config 8260

	bool

	depends on PPC_BOOK3S_32
@@ -46,6 +43,3 @@ config 8272 
	help

	  The MPC8272 CPM has a different internal dpram setup than other CPM2

	  devices
 


config PQ2_ADS_PCI_PIC

	bool

arch/powerpc/platforms/82xx/Makefile

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Original line number Diff line number Diff line
@@ -3,6 +3,5 @@ 
# Makefile for the PowerPC 82xx linux kernel.

#

obj-$(CONFIG_CPM2) += pq2.o

obj-$(CONFIG_PQ2_ADS_PCI_PIC) += pq2ads-pci-pic.o

obj-$(CONFIG_EP8248E) += ep8248e.o

obj-$(CONFIG_MGCOGE) += km82xx.o

arch/powerpc/platforms/82xx/pq2ads-pci-pic.c

deleted100644 → 0
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Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * PQ2 ADS-style PCI interrupt controller

 *

 * Copyright 2007 Freescale Semiconductor, Inc.

 * Author: Scott Wood <scottwood@freescale.com>

 *

 * Loosely based on mpc82xx ADS support by Vitaly Bordug <vbordug@ru.mvista.com>

 * Copyright (c) 2006 MontaVista Software, Inc.

 */



#include <linux/init.h>

#include <linux/spinlock.h>

#include <linux/irq.h>

#include <linux/types.h>

#include <linux/slab.h>

#include <linux/of_irq.h>



#include <asm/io.h>

#include <asm/cpm2.h>



#include "pq2.h"



static DEFINE_RAW_SPINLOCK(pci_pic_lock);



struct pq2ads_pci_pic {

	struct device_node *node;

	struct irq_domain *host;



	struct {

		u32 stat;

		u32 mask;

	} __iomem *regs;

};



#define NUM_IRQS 32



static void pq2ads_pci_mask_irq(struct irq_data *d)

{

	struct pq2ads_pci_pic *priv = irq_data_get_irq_chip_data(d);

	int irq = NUM_IRQS - irqd_to_hwirq(d) - 1;



	if (irq != -1) {

		unsigned long flags;

		raw_spin_lock_irqsave(&pci_pic_lock, flags);



		setbits32(&priv->regs->mask, 1 << irq);

		mb();



		raw_spin_unlock_irqrestore(&pci_pic_lock, flags);

	}

}



static void pq2ads_pci_unmask_irq(struct irq_data *d)

{

	struct pq2ads_pci_pic *priv = irq_data_get_irq_chip_data(d);

	int irq = NUM_IRQS - irqd_to_hwirq(d) - 1;



	if (irq != -1) {

		unsigned long flags;



		raw_spin_lock_irqsave(&pci_pic_lock, flags);

		clrbits32(&priv->regs->mask, 1 << irq);

		raw_spin_unlock_irqrestore(&pci_pic_lock, flags);

	}

}



static struct irq_chip pq2ads_pci_ic = {

	.name = "PQ2 ADS PCI",

	.irq_mask = pq2ads_pci_mask_irq,

	.irq_mask_ack = pq2ads_pci_mask_irq,

	.irq_ack = pq2ads_pci_mask_irq,

	.irq_unmask = pq2ads_pci_unmask_irq,

	.irq_enable = pq2ads_pci_unmask_irq,

	.irq_disable = pq2ads_pci_mask_irq

};



static void pq2ads_pci_irq_demux(struct irq_desc *desc)

{

	struct pq2ads_pci_pic *priv = irq_desc_get_handler_data(desc);

	u32 stat, mask, pend;

	int bit;



	for (;;) {

		stat = in_be32(&priv->regs->stat);

		mask = in_be32(&priv->regs->mask);



		pend = stat & ~mask;



		if (!pend)

			break;



		for (bit = 0; pend != 0; ++bit, pend <<= 1) {

			if (pend & 0x80000000)

				generic_handle_domain_irq(priv->host, bit);

		}

	}

}



static int pci_pic_host_map(struct irq_domain *h, unsigned int virq,

			    irq_hw_number_t hw)

{

	irq_set_status_flags(virq, IRQ_LEVEL);

	irq_set_chip_data(virq, h->host_data);

	irq_set_chip_and_handler(virq, &pq2ads_pci_ic, handle_level_irq);

	return 0;

}



static const struct irq_domain_ops pci_pic_host_ops = {

	.map = pci_pic_host_map,

};



int __init pq2ads_pci_init_irq(void)

{

	struct pq2ads_pci_pic *priv;

	struct irq_domain *host;

	struct device_node *np;

	int ret = -ENODEV;

	int irq;



	np = of_find_compatible_node(NULL, NULL, "fsl,pq2ads-pci-pic");

	if (!np) {

		printk(KERN_ERR "No pci pic node in device tree.\n");

		goto out;

	}



	irq = irq_of_parse_and_map(np, 0);

	if (!irq) {

		printk(KERN_ERR "No interrupt in pci pic node.\n");

		goto out_put_node;

	}



	priv = kzalloc(sizeof(*priv), GFP_KERNEL);

	if (!priv) {

		ret = -ENOMEM;

		goto out_unmap_irq;

	}



	/* PCI interrupt controller registers: status and mask */

	priv->regs = of_iomap(np, 0);

	if (!priv->regs) {

		printk(KERN_ERR "Cannot map PCI PIC registers.\n");

		goto out_free_kmalloc;

	}



	/* mask all PCI interrupts */

	out_be32(&priv->regs->mask, ~0);

	mb();



	host = irq_domain_add_linear(np, NUM_IRQS, &pci_pic_host_ops, priv);

	if (!host) {

		ret = -ENOMEM;

		goto out_unmap_regs;

	}



	priv->host = host;

	irq_set_handler_data(irq, priv);

	irq_set_chained_handler(irq, pq2ads_pci_irq_demux);

	ret = 0;

	goto out_put_node;



out_unmap_regs:

	iounmap(priv->regs);

out_free_kmalloc:

	kfree(priv);

out_unmap_irq:

	irq_dispose_mapping(irq);

out_put_node:

	of_node_put(np);

out:

	return ret;

}

arch/powerpc/platforms/82xx/pq2ads.h

deleted100644 → 0
+0 −40
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-or-later */

/*

 * PQ2/mpc8260 board-specific stuff

 *

 * A collection of structures, addresses, and values associated with

 * the Freescale MPC8260ADS/MPC8266ADS-PCI boards.

 * Copied from the RPX-Classic and SBS8260 stuff.

 *

 * Author: Vitaly Bordug <vbordug@ru.mvista.com>

 *

 * Originally written by Dan Malek for Motorola MPC8260 family

 *

 * Copyright (c) 2001 Dan Malek <dan@embeddedalley.com>

 * Copyright (c) 2006 MontaVista Software, Inc.

 */



#ifdef __KERNEL__

#ifndef __MACH_ADS8260_DEFS

#define __MACH_ADS8260_DEFS



#include <linux/seq_file.h>



/* The ADS8260 has 16, 32-bit wide control/status registers, accessed

 * only on word boundaries.

 * Not all are used (yet), or are interesting to us (yet).

 */



/* Things of interest in the CSR.

 */

#define BCSR0_LED0		((uint)0x02000000)      /* 0 == on */

#define BCSR0_LED1		((uint)0x01000000)      /* 0 == on */

#define BCSR1_FETHIEN		((uint)0x08000000)      /* 0 == enable*/

#define BCSR1_FETH_RST		((uint)0x04000000)      /* 0 == reset */

#define BCSR1_RS232_EN1		((uint)0x02000000)      /* 0 ==enable */

#define BCSR1_RS232_EN2		((uint)0x01000000)      /* 0 ==enable */

#define BCSR3_FETHIEN2		((uint)0x10000000)      /* 0 == enable*/

#define BCSR3_FETH2_RST		((uint)0x80000000)      /* 0 == reset */



#endif /* __MACH_ADS8260_DEFS */

#endif /* __KERNEL__ */