Commit aaad9007 authored by Samuel Holland's avatar Samuel Holland Committed by Chen-Yu Tsai
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arm64: dts: allwinner: h6: Add RSB controller node 



The H6 SoC contains an undocumented but fully functional RSB controller.
Add support for it. The MMIO register address matches other SoCs of the
same generation, and the IRQ matches a hole in the documented IRQ list.

Signed-off-by: default avatarSamuel Holland <samuel@sholland.org>
Acked-by: default avatarMaxime Ripard <mripard@kernel.org>
[wens@csie.org: Use raw numbers instead of macros for clock/reset index]
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
parent 8837e845

arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi

+19 −0
Original line number Diff line number Diff line
@@ -956,6 +956,11 @@ r_ir_rx_pin: r-ir-rx-pin { 
				pins = "PL9";

				function = "s_cir_rx";

			};



			r_rsb_pins: r-rsb-pins {

				pins = "PL0", "PL1";

				function = "s_rsb";

			};

		};



		r_ir: ir@7040000 {
@@ -986,6 +991,20 @@ r_i2c: i2c@7081400 { 
			#size-cells = <0>;

		};



		r_rsb: rsb@7083000 {

			compatible = "allwinner,sun8i-a23-rsb";

			reg = <0x07083000 0x400>;

			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&r_ccu 13>;

			clock-frequency = <3000000>;

			resets = <&r_ccu 7>;

			pinctrl-names = "default";

			pinctrl-0 = <&r_rsb_pins>;

			status = "disabled";

			#address-cells = <1>;

			#size-cells = <0>;

		};



		ths: thermal-sensor@5070400 {

			compatible = "allwinner,sun50i-h6-ths";

			reg = <0x05070400 0x100>;