Loading drivers/gpu/drm/nouveau/nvkm/subdev/bus/gf100.c +9 −9 Original line number Diff line number Diff line Loading @@ -27,15 +27,15 @@ static void gf100_bus_intr(struct nvkm_subdev *subdev) { struct nvkm_bus *bus = nvkm_bus(subdev); struct nvkm_device *device = bus->subdev.device; struct nvkm_device *device = subdev->device; u32 stat = nvkm_rd32(device, 0x001100) & nvkm_rd32(device, 0x001140); if (stat & 0x0000000e) { u32 addr = nvkm_rd32(device, 0x009084); u32 data = nvkm_rd32(device, 0x009088); nv_error(bus, "MMIO %s of 0x%08x FAULT at 0x%06x [ %s%s%s]\n", nvkm_error(subdev, "MMIO %s of %08x FAULT at %06x [ %s%s%s]\n", (addr & 0x00000002) ? "write" : "read", data, (addr & 0x00fffffc), (stat & 0x00000002) ? "!ENGINE " : "", Loading @@ -48,7 +48,7 @@ gf100_bus_intr(struct nvkm_subdev *subdev) } if (stat) { nv_error(bus, "unknown intr 0x%08x\n", stat); nvkm_error(subdev, "intr %08x\n", stat); nvkm_mask(device, 0x001140, stat, 0x00000000); } } Loading drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.c +9 −8 Original line number Diff line number Diff line Loading @@ -64,20 +64,21 @@ nvkm_hwsq_fini(struct nvkm_hwsq **phwsq, bool exec) int ret = 0, i; if (hwsq) { struct nvkm_bus *bus = hwsq->bus; struct nvkm_subdev *subdev = &bus->subdev; hwsq->c.size = (hwsq->c.size + 4) / 4; if (hwsq->c.size <= bus->hwsq_size) { if (exec) ret = bus->hwsq_exec(bus, (u32 *)hwsq->c.data, hwsq->c.size); if (ret) nv_error(bus, "hwsq exec failed: %d\n", ret); nvkm_error(subdev, "hwsq exec failed: %d\n", ret); } else { nv_error(bus, "hwsq ucode too large\n"); nvkm_error(subdev, "hwsq ucode too large\n"); ret = -ENOSPC; } for (i = 0; ret && i < hwsq->c.size; i++) nv_error(bus, "\t0x%08x\n", ((u32 *)hwsq->c.data)[i]); nvkm_error(subdev, "\t%08x\n", ((u32 *)hwsq->c.data)[i]); *phwsq = NULL; kfree(hwsq); Loading @@ -88,7 +89,7 @@ nvkm_hwsq_fini(struct nvkm_hwsq **phwsq, bool exec) void nvkm_hwsq_wr32(struct nvkm_hwsq *hwsq, u32 addr, u32 data) { nv_debug(hwsq->bus, "R[%06x] = 0x%08x\n", addr, data); nvkm_debug(&hwsq->bus->subdev, "R[%06x] = %08x\n", addr, data); if (hwsq->data != data) { if ((data & 0xffff0000) != (hwsq->data & 0xffff0000)) { Loading @@ -113,7 +114,7 @@ nvkm_hwsq_wr32(struct nvkm_hwsq *hwsq, u32 addr, u32 data) void nvkm_hwsq_setf(struct nvkm_hwsq *hwsq, u8 flag, int data) { nv_debug(hwsq->bus, " FLAG[%02x] = %d\n", flag, data); nvkm_debug(&hwsq->bus->subdev, " FLAG[%02x] = %d\n", flag, data); flag += 0x80; if (data >= 0) flag += 0x20; Loading @@ -125,7 +126,7 @@ nvkm_hwsq_setf(struct nvkm_hwsq *hwsq, u8 flag, int data) void nvkm_hwsq_wait(struct nvkm_hwsq *hwsq, u8 flag, u8 data) { nv_debug(hwsq->bus, " WAIT[%02x] = %d\n", flag, data); nvkm_debug(&hwsq->bus->subdev, " WAIT[%02x] = %d\n", flag, data); hwsq_cmd(hwsq, 3, (u8[]){ 0x5f, flag, data }); } Loading @@ -138,6 +139,6 @@ nvkm_hwsq_nsec(struct nvkm_hwsq *hwsq, u32 nsec) shift++; } nv_debug(hwsq->bus, " DELAY = %d ns\n", nsec); nvkm_debug(&hwsq->bus->subdev, " DELAY = %d ns\n", nsec); hwsq_cmd(hwsq, 1, (u8[]){ 0x00 | (shift << 2) | usec }); } drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv04.c +8 −7 Original line number Diff line number Diff line Loading @@ -24,29 +24,30 @@ */ #include "nv04.h" #include <subdev/gpio.h> static void nv04_bus_intr(struct nvkm_subdev *subdev) { struct nvkm_bus *bus = nvkm_bus(subdev); struct nvkm_device *device = bus->subdev.device; struct nvkm_device *device = subdev->device; u32 stat = nvkm_rd32(device, 0x001100) & nvkm_rd32(device, 0x001140); if (stat & 0x00000001) { nv_error(bus, "BUS ERROR\n"); nvkm_error(subdev, "BUS ERROR\n"); stat &= ~0x00000001; nvkm_wr32(device, 0x001100, 0x00000001); } if (stat & 0x00000110) { subdev = nvkm_subdev(subdev, NVDEV_SUBDEV_GPIO); if (subdev && subdev->intr) subdev->intr(subdev); struct nvkm_gpio *gpio = device->gpio; if (gpio && gpio->subdev.intr) gpio->subdev.intr(&gpio->subdev); stat &= ~0x00000110; nvkm_wr32(device, 0x001100, 0x00000110); } if (stat) { nv_error(bus, "unknown intr 0x%08x\n", stat); nvkm_error(subdev, "intr %08x\n", stat); nvkm_mask(device, 0x001140, stat, 0x00000000); } } Loading drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv31.c +14 −12 Original line number Diff line number Diff line Loading @@ -24,25 +24,27 @@ */ #include "nv04.h" #include <subdev/gpio.h> #include <subdev/therm.h> static void nv31_bus_intr(struct nvkm_subdev *subdev) { struct nvkm_bus *bus = nvkm_bus(subdev); struct nvkm_device *device = bus->subdev.device; struct nvkm_device *device = subdev->device; u32 stat = nvkm_rd32(device, 0x001100) & nvkm_rd32(device, 0x001140); u32 gpio = nvkm_rd32(device, 0x001104) & nvkm_rd32(device, 0x001144); if (gpio) { subdev = nvkm_subdev(bus, NVDEV_SUBDEV_GPIO); if (subdev && subdev->intr) subdev->intr(subdev); struct nvkm_gpio *gpio = device->gpio; if (gpio && gpio->subdev.intr) gpio->subdev.intr(&gpio->subdev); } if (stat & 0x00000008) { /* NV41- */ u32 addr = nvkm_rd32(device, 0x009084); u32 data = nvkm_rd32(device, 0x009088); nv_error(bus, "MMIO %s of 0x%08x FAULT at 0x%06x\n", nvkm_error(subdev, "MMIO %s of %08x FAULT at %06x\n", (addr & 0x00000002) ? "write" : "read", data, (addr & 0x00fffffc)); Loading @@ -51,15 +53,15 @@ nv31_bus_intr(struct nvkm_subdev *subdev) } if (stat & 0x00070000) { subdev = nvkm_subdev(bus, NVDEV_SUBDEV_THERM); if (subdev && subdev->intr) subdev->intr(subdev); struct nvkm_therm *therm = device->therm; if (therm && therm->subdev.intr) therm->subdev.intr(&therm->subdev); stat &= ~0x00070000; nvkm_wr32(device, 0x001100, 0x00070000); } if (stat) { nv_error(bus, "unknown intr 0x%08x\n", stat); nvkm_error(subdev, "intr %08x\n", stat); nvkm_mask(device, 0x001140, stat, 0x00000000); } } Loading drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv50.c +9 −9 Original line number Diff line number Diff line Loading @@ -24,6 +24,7 @@ */ #include "nv04.h" #include <subdev/therm.h> #include <subdev/timer.h> static int Loading Loading @@ -51,15 +52,14 @@ nv50_bus_hwsq_exec(struct nvkm_bus *bus, u32 *data, u32 size) void nv50_bus_intr(struct nvkm_subdev *subdev) { struct nvkm_bus *bus = nvkm_bus(subdev); struct nvkm_device *device = bus->subdev.device; struct nvkm_device *device = subdev->device; u32 stat = nvkm_rd32(device, 0x001100) & nvkm_rd32(device, 0x001140); if (stat & 0x00000008) { u32 addr = nvkm_rd32(device, 0x009084); u32 data = nvkm_rd32(device, 0x009088); nv_error(bus, "MMIO %s of 0x%08x FAULT at 0x%06x\n", nvkm_error(subdev, "MMIO %s of %08x FAULT at %06x\n", (addr & 0x00000002) ? "write" : "read", data, (addr & 0x00fffffc)); Loading @@ -68,15 +68,15 @@ nv50_bus_intr(struct nvkm_subdev *subdev) } if (stat & 0x00010000) { subdev = nvkm_subdev(bus, NVDEV_SUBDEV_THERM); if (subdev && subdev->intr) subdev->intr(subdev); struct nvkm_therm *therm = device->therm; if (therm && therm->subdev.intr) therm->subdev.intr(&therm->subdev); stat &= ~0x00010000; nvkm_wr32(device, 0x001100, 0x00010000); } if (stat) { nv_error(bus, "unknown intr 0x%08x\n", stat); nvkm_error(subdev, "intr %08x\n", stat); nvkm_mask(device, 0x001140, stat, 0); } } Loading Loading
drivers/gpu/drm/nouveau/nvkm/subdev/bus/gf100.c +9 −9 Original line number Diff line number Diff line Loading @@ -27,15 +27,15 @@ static void gf100_bus_intr(struct nvkm_subdev *subdev) { struct nvkm_bus *bus = nvkm_bus(subdev); struct nvkm_device *device = bus->subdev.device; struct nvkm_device *device = subdev->device; u32 stat = nvkm_rd32(device, 0x001100) & nvkm_rd32(device, 0x001140); if (stat & 0x0000000e) { u32 addr = nvkm_rd32(device, 0x009084); u32 data = nvkm_rd32(device, 0x009088); nv_error(bus, "MMIO %s of 0x%08x FAULT at 0x%06x [ %s%s%s]\n", nvkm_error(subdev, "MMIO %s of %08x FAULT at %06x [ %s%s%s]\n", (addr & 0x00000002) ? "write" : "read", data, (addr & 0x00fffffc), (stat & 0x00000002) ? "!ENGINE " : "", Loading @@ -48,7 +48,7 @@ gf100_bus_intr(struct nvkm_subdev *subdev) } if (stat) { nv_error(bus, "unknown intr 0x%08x\n", stat); nvkm_error(subdev, "intr %08x\n", stat); nvkm_mask(device, 0x001140, stat, 0x00000000); } } Loading
drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.c +9 −8 Original line number Diff line number Diff line Loading @@ -64,20 +64,21 @@ nvkm_hwsq_fini(struct nvkm_hwsq **phwsq, bool exec) int ret = 0, i; if (hwsq) { struct nvkm_bus *bus = hwsq->bus; struct nvkm_subdev *subdev = &bus->subdev; hwsq->c.size = (hwsq->c.size + 4) / 4; if (hwsq->c.size <= bus->hwsq_size) { if (exec) ret = bus->hwsq_exec(bus, (u32 *)hwsq->c.data, hwsq->c.size); if (ret) nv_error(bus, "hwsq exec failed: %d\n", ret); nvkm_error(subdev, "hwsq exec failed: %d\n", ret); } else { nv_error(bus, "hwsq ucode too large\n"); nvkm_error(subdev, "hwsq ucode too large\n"); ret = -ENOSPC; } for (i = 0; ret && i < hwsq->c.size; i++) nv_error(bus, "\t0x%08x\n", ((u32 *)hwsq->c.data)[i]); nvkm_error(subdev, "\t%08x\n", ((u32 *)hwsq->c.data)[i]); *phwsq = NULL; kfree(hwsq); Loading @@ -88,7 +89,7 @@ nvkm_hwsq_fini(struct nvkm_hwsq **phwsq, bool exec) void nvkm_hwsq_wr32(struct nvkm_hwsq *hwsq, u32 addr, u32 data) { nv_debug(hwsq->bus, "R[%06x] = 0x%08x\n", addr, data); nvkm_debug(&hwsq->bus->subdev, "R[%06x] = %08x\n", addr, data); if (hwsq->data != data) { if ((data & 0xffff0000) != (hwsq->data & 0xffff0000)) { Loading @@ -113,7 +114,7 @@ nvkm_hwsq_wr32(struct nvkm_hwsq *hwsq, u32 addr, u32 data) void nvkm_hwsq_setf(struct nvkm_hwsq *hwsq, u8 flag, int data) { nv_debug(hwsq->bus, " FLAG[%02x] = %d\n", flag, data); nvkm_debug(&hwsq->bus->subdev, " FLAG[%02x] = %d\n", flag, data); flag += 0x80; if (data >= 0) flag += 0x20; Loading @@ -125,7 +126,7 @@ nvkm_hwsq_setf(struct nvkm_hwsq *hwsq, u8 flag, int data) void nvkm_hwsq_wait(struct nvkm_hwsq *hwsq, u8 flag, u8 data) { nv_debug(hwsq->bus, " WAIT[%02x] = %d\n", flag, data); nvkm_debug(&hwsq->bus->subdev, " WAIT[%02x] = %d\n", flag, data); hwsq_cmd(hwsq, 3, (u8[]){ 0x5f, flag, data }); } Loading @@ -138,6 +139,6 @@ nvkm_hwsq_nsec(struct nvkm_hwsq *hwsq, u32 nsec) shift++; } nv_debug(hwsq->bus, " DELAY = %d ns\n", nsec); nvkm_debug(&hwsq->bus->subdev, " DELAY = %d ns\n", nsec); hwsq_cmd(hwsq, 1, (u8[]){ 0x00 | (shift << 2) | usec }); }
drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv04.c +8 −7 Original line number Diff line number Diff line Loading @@ -24,29 +24,30 @@ */ #include "nv04.h" #include <subdev/gpio.h> static void nv04_bus_intr(struct nvkm_subdev *subdev) { struct nvkm_bus *bus = nvkm_bus(subdev); struct nvkm_device *device = bus->subdev.device; struct nvkm_device *device = subdev->device; u32 stat = nvkm_rd32(device, 0x001100) & nvkm_rd32(device, 0x001140); if (stat & 0x00000001) { nv_error(bus, "BUS ERROR\n"); nvkm_error(subdev, "BUS ERROR\n"); stat &= ~0x00000001; nvkm_wr32(device, 0x001100, 0x00000001); } if (stat & 0x00000110) { subdev = nvkm_subdev(subdev, NVDEV_SUBDEV_GPIO); if (subdev && subdev->intr) subdev->intr(subdev); struct nvkm_gpio *gpio = device->gpio; if (gpio && gpio->subdev.intr) gpio->subdev.intr(&gpio->subdev); stat &= ~0x00000110; nvkm_wr32(device, 0x001100, 0x00000110); } if (stat) { nv_error(bus, "unknown intr 0x%08x\n", stat); nvkm_error(subdev, "intr %08x\n", stat); nvkm_mask(device, 0x001140, stat, 0x00000000); } } Loading
drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv31.c +14 −12 Original line number Diff line number Diff line Loading @@ -24,25 +24,27 @@ */ #include "nv04.h" #include <subdev/gpio.h> #include <subdev/therm.h> static void nv31_bus_intr(struct nvkm_subdev *subdev) { struct nvkm_bus *bus = nvkm_bus(subdev); struct nvkm_device *device = bus->subdev.device; struct nvkm_device *device = subdev->device; u32 stat = nvkm_rd32(device, 0x001100) & nvkm_rd32(device, 0x001140); u32 gpio = nvkm_rd32(device, 0x001104) & nvkm_rd32(device, 0x001144); if (gpio) { subdev = nvkm_subdev(bus, NVDEV_SUBDEV_GPIO); if (subdev && subdev->intr) subdev->intr(subdev); struct nvkm_gpio *gpio = device->gpio; if (gpio && gpio->subdev.intr) gpio->subdev.intr(&gpio->subdev); } if (stat & 0x00000008) { /* NV41- */ u32 addr = nvkm_rd32(device, 0x009084); u32 data = nvkm_rd32(device, 0x009088); nv_error(bus, "MMIO %s of 0x%08x FAULT at 0x%06x\n", nvkm_error(subdev, "MMIO %s of %08x FAULT at %06x\n", (addr & 0x00000002) ? "write" : "read", data, (addr & 0x00fffffc)); Loading @@ -51,15 +53,15 @@ nv31_bus_intr(struct nvkm_subdev *subdev) } if (stat & 0x00070000) { subdev = nvkm_subdev(bus, NVDEV_SUBDEV_THERM); if (subdev && subdev->intr) subdev->intr(subdev); struct nvkm_therm *therm = device->therm; if (therm && therm->subdev.intr) therm->subdev.intr(&therm->subdev); stat &= ~0x00070000; nvkm_wr32(device, 0x001100, 0x00070000); } if (stat) { nv_error(bus, "unknown intr 0x%08x\n", stat); nvkm_error(subdev, "intr %08x\n", stat); nvkm_mask(device, 0x001140, stat, 0x00000000); } } Loading
drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv50.c +9 −9 Original line number Diff line number Diff line Loading @@ -24,6 +24,7 @@ */ #include "nv04.h" #include <subdev/therm.h> #include <subdev/timer.h> static int Loading Loading @@ -51,15 +52,14 @@ nv50_bus_hwsq_exec(struct nvkm_bus *bus, u32 *data, u32 size) void nv50_bus_intr(struct nvkm_subdev *subdev) { struct nvkm_bus *bus = nvkm_bus(subdev); struct nvkm_device *device = bus->subdev.device; struct nvkm_device *device = subdev->device; u32 stat = nvkm_rd32(device, 0x001100) & nvkm_rd32(device, 0x001140); if (stat & 0x00000008) { u32 addr = nvkm_rd32(device, 0x009084); u32 data = nvkm_rd32(device, 0x009088); nv_error(bus, "MMIO %s of 0x%08x FAULT at 0x%06x\n", nvkm_error(subdev, "MMIO %s of %08x FAULT at %06x\n", (addr & 0x00000002) ? "write" : "read", data, (addr & 0x00fffffc)); Loading @@ -68,15 +68,15 @@ nv50_bus_intr(struct nvkm_subdev *subdev) } if (stat & 0x00010000) { subdev = nvkm_subdev(bus, NVDEV_SUBDEV_THERM); if (subdev && subdev->intr) subdev->intr(subdev); struct nvkm_therm *therm = device->therm; if (therm && therm->subdev.intr) therm->subdev.intr(&therm->subdev); stat &= ~0x00010000; nvkm_wr32(device, 0x001100, 0x00010000); } if (stat) { nv_error(bus, "unknown intr 0x%08x\n", stat); nvkm_error(subdev, "intr %08x\n", stat); nvkm_mask(device, 0x001140, stat, 0); } } Loading