Commit a3f457d9 authored by Chris Zhong's avatar Chris Zhong Committed by Heiko Stuebner
Browse files

clk: rockchip: fix rk3399 aclk_vio gate bit

Fix incorrect rk3399 aclk_vio gating bit, it should be 0, not 10.

Fixes: 11551005

 ("clk: rockchip: add clock controller for the RK3399")
Signed-off-by: default avatarChris Zhong <zyw@rock-chips.com>
Reviewed-by: default avatarXing Zheng <zhengxing@rock-chips.com>
Reviewed-by: default avatarGuenter Roeck <groeck@chromium.org>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 29b4817d
Supports Markdown
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment