Commit a3855ebc authored by Marian-Cristian Rotariu's avatar Marian-Cristian Rotariu Committed by Geert Uytterhoeven
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arm64: dts: renesas: r8a774e1: Add FCPF and FCPV instances

parent 549f4391
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+64 −0
Original line number Diff line number Diff line
@@ -2376,6 +2376,70 @@ pciec1: pcie@ee800000 {
			status = "disabled";
		};

		fcpf0: fcp@fe950000 {
			compatible = "renesas,fcpf";
			reg = <0 0xfe950000 0 0x200>;
			clocks = <&cpg CPG_MOD 615>;
			power-domains = <&sysc R8A774E1_PD_A3VP>;
			resets = <&cpg 615>;
		};

		fcpf1: fcp@fe951000 {
			compatible = "renesas,fcpf";
			reg = <0 0xfe951000 0 0x200>;
			clocks = <&cpg CPG_MOD 614>;
			power-domains = <&sysc R8A774E1_PD_A3VP>;
			resets = <&cpg 614>;
		};

		fcpvb0: fcp@fe96f000 {
			compatible = "renesas,fcpv";
			reg = <0 0xfe96f000 0 0x200>;
			clocks = <&cpg CPG_MOD 607>;
			power-domains = <&sysc R8A774E1_PD_A3VP>;
			resets = <&cpg 607>;
		};

		fcpvb1: fcp@fe92f000 {
			compatible = "renesas,fcpv";
			reg = <0 0xfe92f000 0 0x200>;
			clocks = <&cpg CPG_MOD 606>;
			power-domains = <&sysc R8A774E1_PD_A3VP>;
			resets = <&cpg 606>;
		};

		fcpvi0: fcp@fe9af000 {
			compatible = "renesas,fcpv";
			reg = <0 0xfe9af000 0 0x200>;
			clocks = <&cpg CPG_MOD 611>;
			power-domains = <&sysc R8A774E1_PD_A3VP>;
			resets = <&cpg 611>;
		};

		fcpvi1: fcp@fe9bf000 {
			compatible = "renesas,fcpv";
			reg = <0 0xfe9bf000 0 0x200>;
			clocks = <&cpg CPG_MOD 610>;
			power-domains = <&sysc R8A774E1_PD_A3VP>;
			resets = <&cpg 610>;
		};

		fcpvd0: fcp@fea27000 {
			compatible = "renesas,fcpv";
			reg = <0 0xfea27000 0 0x200>;
			clocks = <&cpg CPG_MOD 603>;
			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
			resets = <&cpg 603>;
		};

		fcpvd1: fcp@fea2f000 {
			compatible = "renesas,fcpv";
			reg = <0 0xfea2f000 0 0x200>;
			clocks = <&cpg CPG_MOD 602>;
			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
			resets = <&cpg 602>;
		};

		csi20: csi2@fea80000 {
			compatible = "renesas,r8a774e1-csi2";
			reg = <0 0xfea80000 0 0x10000>;