Commit a30cc07f authored by Rex-BC Chen's avatar Rex-BC Chen Committed by Matthias Brugger
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arm64: dts: mediatek: Add infra #reset-cells property for MT8192 



To support reset of infra, we add property of #reset-cells.

Signed-off-by: default avatarRex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220503093856.22250-16-rex-bc.chen@mediatek.com


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 0be021f9

arch/arm64/boot/dts/mediatek/mt8192.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -271,6 +271,7 @@ infracfg: syscon@10001000 { 
			compatible = "mediatek,mt8192-infracfg", "syscon";

			reg = <0 0x10001000 0 0x1000>;

			#clock-cells = <1>;

			#reset-cells = <1>;

		};



		pericfg: syscon@10003000 {