Commit a2909ff4 authored by Rodrigo Siqueira's avatar Rodrigo Siqueira Committed by Alex Deucher
Browse files

drm/amd/display: Drop unused code for DCN32/321 



Under DCN32/321 we identified some code paths that DC never executes.
This commit removes those unused codes to avoid distractions when
debugging issues.

Reviewed-by: default avatarAurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2d550a15

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.c

+0 −7
Original line number Diff line number Diff line
@@ -150,12 +150,6 @@ static void dcn32_link_encoder_get_max_link_cap(struct link_encoder *enc, 


}



void enc32_set_dig_output_mode(struct link_encoder *enc, uint8_t pix_per_container)

{

	struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);

	REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_OUTPUT_PIXEL_MODE, pix_per_container);

}

 

static const struct link_encoder_funcs dcn32_link_enc_funcs = {

	.read_state = link_enc2_read_state,

	.validate_output_with_stream =
@@ -186,7 +180,6 @@ static const struct link_encoder_funcs dcn32_link_enc_funcs = { 
	.is_in_alt_mode = dcn32_link_encoder_is_in_alt_mode,

	.get_max_link_cap = dcn32_link_encoder_get_max_link_cap,

	.set_dio_phy_mux = dcn31_link_encoder_set_dio_phy_mux,

	.set_dig_output_mode = enc32_set_dig_output_mode,

};



void dcn32_link_encoder_construct(

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.h

+0 −4
Original line number Diff line number Diff line
@@ -53,8 +53,4 @@ void dcn32_link_encoder_enable_dp_output( 
	const struct dc_link_settings *link_settings,

	enum clock_source_id clock_source);



void enc32_set_dig_output_mode(

		struct link_encoder *enc,

		uint8_t pix_per_container);



#endif /* __DC_LINK_ENCODER__DCN32_H__ */

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.c

+0 −20
Original line number Diff line number Diff line
@@ -411,24 +411,6 @@ static void enc32_read_state(struct stream_encoder *enc, struct enc_state *s) 
	}

}



static void enc32_stream_encoder_reset_fifo(struct stream_encoder *enc)

{

	struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc);

	uint32_t fifo_enabled;



	REG_GET(DIG_FIFO_CTRL0, DIG_FIFO_ENABLE, &fifo_enabled);



	if (fifo_enabled == 0) {

		/* reset DIG resync FIFO */

		REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_RESET, 1);

		/* TODO: fix timeout when wait for DIG_FIFO_RESET_DONE */

		//REG_WAIT(DIG_FIFO_CTRL0, DIG_FIFO_RESET_DONE, 1, 1, 100);

		udelay(1);

		REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_RESET, 0);

		REG_WAIT(DIG_FIFO_CTRL0, DIG_FIFO_RESET_DONE, 0, 1, 100);

	}

}



static void enc32_set_dig_input_mode(struct stream_encoder *enc, unsigned int pix_per_container)

{

	struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc);
@@ -458,8 +440,6 @@ static const struct stream_encoder_funcs dcn32_str_enc_funcs = { 
		enc3_stream_encoder_update_dp_info_packets,

	.stop_dp_info_packets =

		enc1_stream_encoder_stop_dp_info_packets,

	.reset_fifo =

		enc32_stream_encoder_reset_fifo,

	.dp_blank =

		enc1_stream_encoder_dp_blank,

	.dp_unblank =

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubp.c

+1 −2
Original line number Diff line number Diff line
@@ -185,8 +185,7 @@ static struct hubp_funcs dcn32_hubp_funcs = { 
	.hubp_update_force_pstate_disallow = hubp32_update_force_pstate_disallow,

	.phantom_hubp_post_enable = hubp32_phantom_hubp_post_enable,

	.hubp_update_mall_sel = hubp32_update_mall_sel,

	.hubp_prepare_subvp_buffering = hubp32_prepare_subvp_buffering,

	.hubp_set_flip_int = hubp1_set_flip_int

	.hubp_prepare_subvp_buffering = hubp32_prepare_subvp_buffering

};



bool hubp32_construct(

drivers/gpu/drm/amd/display/dc/dcn321/dcn321_dio_link_encoder.c

+0 −1
Original line number Diff line number Diff line
@@ -91,7 +91,6 @@ static const struct link_encoder_funcs dcn321_link_enc_funcs = { 
	.is_in_alt_mode = dcn20_link_encoder_is_in_alt_mode,

	.get_max_link_cap = dcn20_link_encoder_get_max_link_cap,

	.set_dio_phy_mux = dcn31_link_encoder_set_dio_phy_mux,

	.set_dig_output_mode = enc32_set_dig_output_mode,

};



void dcn321_link_encoder_construct(