Commit 9fbd96a1 authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher
Browse files

drm/amdgpu: enable psp v13 ip block for aldebaran 



Add psp v13 ip block to soc ip init list for aldebaran

Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarLe Ma <Le.Ma@amd.com>
Reviewed-by: default avatarKevin Wang <kevin1.wang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent efec10c1

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

+8 −0
Original line number Diff line number Diff line
@@ -3057,3 +3057,11 @@ const struct amdgpu_ip_block_version psp_v12_0_ip_block = 
	.rev = 0,

	.funcs = &psp_ip_funcs,

};



const struct amdgpu_ip_block_version psp_v13_0_ip_block = {

	.type = AMD_IP_BLOCK_TYPE_PSP,

	.major = 13,

	.minor = 0,

	.rev = 0,

	.funcs = &psp_ip_funcs,

};

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

+5 −4
Original line number Diff line number Diff line
@@ -365,11 +365,13 @@ struct amdgpu_psp_funcs { 
extern const struct amd_ip_funcs psp_ip_funcs;



extern const struct amdgpu_ip_block_version psp_v3_1_ip_block;

extern int psp_wait_for(struct psp_context *psp, uint32_t reg_index,

			uint32_t field_val, uint32_t mask, bool check_changed);



extern const struct amdgpu_ip_block_version psp_v10_0_ip_block;

extern const struct amdgpu_ip_block_version psp_v11_0_ip_block;

extern const struct amdgpu_ip_block_version psp_v12_0_ip_block;

extern const struct amdgpu_ip_block_version psp_v13_0_ip_block;



extern int psp_wait_for(struct psp_context *psp, uint32_t reg_index,

			uint32_t field_val, uint32_t mask, bool check_changed);



int psp_gpu_reset(struct amdgpu_device *adev);

int psp_update_vcn_sram(struct amdgpu_device *adev, int inst_idx,
@@ -400,7 +402,6 @@ int psp_securedisplay_invoke(struct psp_context *psp, uint32_t ta_cmd_id); 


int psp_rlc_autoload_start(struct psp_context *psp);



extern const struct amdgpu_ip_block_version psp_v11_0_ip_block;

int psp_reg_program(struct psp_context *psp, enum psp_reg_prog_id reg,

		uint32_t value);

int psp_ring_cmd_submit(struct psp_context *psp,

drivers/gpu/drm/amd/amdgpu/soc15.c

+11 −1
Original line number Diff line number Diff line
@@ -1065,7 +1065,17 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) 
	case CHIP_ALDEBARAN:

		amdgpu_device_ip_block_add(adev, &vega10_common_ip_block);

		amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block);



		if (amdgpu_sriov_vf(adev)) {

			if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP))

				amdgpu_device_ip_block_add(adev, &psp_v13_0_ip_block);

			amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block);

		} else {

			amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block);

			if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP))

				amdgpu_device_ip_block_add(adev, &psp_v13_0_ip_block);

		}



		amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);

		amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);

		break;