Commit 9d68ce35 authored by Michael Straube's avatar Michael Straube Committed by Greg Kroah-Hartman
Browse files

staging: r8188eu: remove ODM_SetMACReg() 



ODM_SetMACReg() is just a wrapper around rtl8188e_PHY_SetBBReg().
Remove ODM_SetMACReg() and call rtl8188e_PHY_SetBBReg() directly.

Signed-off-by: default avatarMichael Straube <straube.linux@gmail.com>
Link: https://lore.kernel.org/r/20211229205108.26373-2-straube.linux@gmail.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 790ada0e

drivers/staging/r8188eu/hal/odm_RTL8188E.c

+11 −7
Original line number Diff line number Diff line
@@ -5,11 +5,12 @@ 


static void odm_RX_HWAntDivInit(struct odm_dm_struct *dm_odm)

{

	struct adapter *adapter = dm_odm->Adapter;

	u32	value32;



	/* MAC Setting */

	value32 = ODM_GetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);

	ODM_SetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */

	rtl8188e_PHY_SetBBReg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */

	/* Pin Settings */

	ODM_SetBBReg(dm_odm, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0	antsel antselb by HW */

	ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0);	/* Reg864[10]=1'b0	antsel2 by HW */
@@ -26,11 +27,12 @@ static void odm_RX_HWAntDivInit(struct odm_dm_struct *dm_odm) 


static void odm_TRX_HWAntDivInit(struct odm_dm_struct *dm_odm)

{

	struct adapter *adapter = dm_odm->Adapter;

	u32	value32;



	/* MAC Setting */

	value32 = ODM_GetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);

	ODM_SetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */

	rtl8188e_PHY_SetBBReg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */

	/* Pin Settings */

	ODM_SetBBReg(dm_odm, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0		antsel antselb by HW */

	ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0);	/* Reg864[10]=1'b0	antsel2 by HW */
@@ -56,17 +58,18 @@ static void odm_TRX_HWAntDivInit(struct odm_dm_struct *dm_odm) 


static void odm_FastAntTrainingInit(struct odm_dm_struct *dm_odm)

{

	struct adapter *adapter = dm_odm->Adapter;

	u32	value32;



	/* MAC Setting */

	value32 = ODM_GetMACReg(dm_odm, 0x4c, bMaskDWord);

	ODM_SetMACReg(dm_odm, 0x4c, bMaskDWord, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */

	rtl8188e_PHY_SetBBReg(adapter, 0x4c, bMaskDWord, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */

	value32 = ODM_GetMACReg(dm_odm,  0x7B4, bMaskDWord);

	ODM_SetMACReg(dm_odm, 0x7b4, bMaskDWord, value32 | (BIT(16) | BIT(17))); /* Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match */

	rtl8188e_PHY_SetBBReg(adapter, 0x7b4, bMaskDWord, value32 | (BIT(16) | BIT(17))); /* Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match */



	/* Match MAC ADDR */

	ODM_SetMACReg(dm_odm, 0x7b4, 0xFFFF, 0);

	ODM_SetMACReg(dm_odm, 0x7b0, bMaskDWord, 0);

	rtl8188e_PHY_SetBBReg(adapter, 0x7b4, 0xFFFF, 0);

	rtl8188e_PHY_SetBBReg(adapter, 0x7b0, bMaskDWord, 0);



	ODM_SetBBReg(dm_odm, 0x870, BIT(9) | BIT(8), 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0		antsel antselb by HW */

	ODM_SetBBReg(dm_odm, 0x864, BIT(10), 0);	/* Reg864[10]=1'b0	antsel2 by HW */
@@ -105,6 +108,7 @@ void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *dm_odm) 
void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *dm_odm, u8 Ant)

{

	struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;

	struct adapter *adapter = dm_odm->Adapter;

	u32	DefaultAnt, OptionalAnt;



	if (dm_fat_tbl->RxIdleAnt != Ant) {
@@ -120,7 +124,7 @@ void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *dm_odm, u8 Ant) 
			ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT(5) | BIT(4) | BIT(3), DefaultAnt);	/* Default RX */

			ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT(8) | BIT(7) | BIT(6), OptionalAnt);		/* Optional RX */

			ODM_SetBBReg(dm_odm, ODM_REG_ANTSEL_CTRL_11N, BIT(14) | BIT(13) | BIT(12), DefaultAnt);	/* Default TX */

			ODM_SetMACReg(dm_odm, ODM_REG_RESP_TX_11N, BIT(6) | BIT(7), DefaultAnt);	/* Resp Tx */

			rtl8188e_PHY_SetBBReg(adapter, ODM_REG_RESP_TX_11N, BIT(6) | BIT(7), DefaultAnt);	/* Resp Tx */

		} else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) {

			ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT(5) | BIT(4) | BIT(3), DefaultAnt);	/* Default RX */

			ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT(8) | BIT(7) | BIT(6), OptionalAnt);		/* Optional RX */

drivers/staging/r8188eu/hal/odm_interface.c

+0 −6
Original line number Diff line number Diff line
@@ -4,12 +4,6 @@ 
#include "../include/odm_precomp.h"

/*  ODM IO Relative API. */



void ODM_SetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data)

{

	struct adapter *Adapter = pDM_Odm->Adapter;

	rtl8188e_PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);

}



u32 ODM_GetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask)

{

	struct adapter *Adapter = pDM_Odm->Adapter;

drivers/staging/r8188eu/include/odm_interface.h

+0 −3
Original line number Diff line number Diff line
@@ -12,9 +12,6 @@ typedef void (*RT_WORKITEM_CALL_BACK)(void *pContext); 


/*  =========== EXtern Function Prototype */



void ODM_SetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr,

		   u32 BitMask, u32 Data);



u32 ODM_GetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask);



void ODM_SetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr,