Commit 9d0af8b4 authored by Oak Zeng's avatar Oak Zeng Committed by Alex Deucher
Browse files

drm/amdgpu: pre-map device buffer as cached for A+A config 



For A+A configuration, device memory is supposed to be mapped as
cachable from CPU side. For kernel pre-map gpu device memory using
ioremap_cache

Signed-off-by: default avatarOak Zeng <Oak.Zeng@amd.com>
Reviewed-by: default avatarChristian Koenig <Christian.Koenig@amd.com>
Tested-by: default avatarAmber Lin <Amber.Lin@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e5a83213

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

+7 −2
Original line number Diff line number Diff line
@@ -1811,6 +1811,11 @@ int amdgpu_ttm_init(struct amdgpu_device *adev) 
	/* Change the size here instead of the init above so only lpfn is affected */

	amdgpu_ttm_set_buffer_funcs_status(adev, false);

#ifdef CONFIG_64BIT

	if (adev->gmc.xgmi.connected_to_cpu)

		adev->mman.aper_base_kaddr = ioremap_cache(adev->gmc.aper_base,

				adev->gmc.visible_vram_size);



	else

		adev->mman.aper_base_kaddr = ioremap_wc(adev->gmc.aper_base,

				adev->gmc.visible_vram_size);

#endif