Commit 9bc7cd07 authored by Tho Vu's avatar Tho Vu Committed by Geert Uytterhoeven
Browse files

arm64: dts: renesas: r8a779f0: Add CPUIdle support 



Support CPUIdle for ARM Cortex-A55 on R-Car S4-8.

Signed-off-by: default avatarTho Vu <tho.vu.wh@renesas.com>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/5310792ce4c06515a5373ff44ceb9b925f007489.1654701480.git.geert+renesas@glider.be
parent 2dcb78d2

arch/arm64/boot/dts/renesas/r8a779f0.dtsi

+21 −0
Original line number Diff line number Diff line
@@ -63,6 +63,7 @@ a55_0: cpu@0 { 
			power-domains = <&sysc R8A779F0_PD_A1E0D0C0>;

			next-level-cache = <&L3_CA55_0>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SLEEP_0>;

		};



		a55_1: cpu@100 {
@@ -72,6 +73,7 @@ a55_1: cpu@100 { 
			power-domains = <&sysc R8A779F0_PD_A1E0D0C1>;

			next-level-cache = <&L3_CA55_0>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SLEEP_0>;

		};



		a55_2: cpu@10000 {
@@ -81,6 +83,7 @@ a55_2: cpu@10000 { 
			power-domains = <&sysc R8A779F0_PD_A1E0D1C0>;

			next-level-cache = <&L3_CA55_1>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SLEEP_0>;

		};



		a55_3: cpu@10100 {
@@ -90,6 +93,7 @@ a55_3: cpu@10100 { 
			power-domains = <&sysc R8A779F0_PD_A1E0D1C1>;

			next-level-cache = <&L3_CA55_1>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SLEEP_0>;

		};



		a55_4: cpu@20000 {
@@ -99,6 +103,7 @@ a55_4: cpu@20000 { 
			power-domains = <&sysc R8A779F0_PD_A1E1D0C0>;

			next-level-cache = <&L3_CA55_2>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SLEEP_0>;

		};



		a55_5: cpu@20100 {
@@ -108,6 +113,7 @@ a55_5: cpu@20100 { 
			power-domains = <&sysc R8A779F0_PD_A1E1D0C1>;

			next-level-cache = <&L3_CA55_2>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SLEEP_0>;

		};



		a55_6: cpu@30000 {
@@ -117,6 +123,7 @@ a55_6: cpu@30000 { 
			power-domains = <&sysc R8A779F0_PD_A1E1D1C0>;

			next-level-cache = <&L3_CA55_3>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SLEEP_0>;

		};



		a55_7: cpu@30100 {
@@ -126,6 +133,7 @@ a55_7: cpu@30100 { 
			power-domains = <&sysc R8A779F0_PD_A1E1D1C1>;

			next-level-cache = <&L3_CA55_3>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SLEEP_0>;

		};



		L3_CA55_0: cache-controller-0 {
@@ -155,6 +163,19 @@ L3_CA55_3: cache-controller-3 { 
			cache-unified;

			cache-level = <3>;

		};



		idle-states {

			entry-method = "psci";



			CPU_SLEEP_0: cpu-sleep-0 {

				compatible = "arm,idle-state";

				arm,psci-suspend-param = <0x0010000>;

				local-timer-stop;

				entry-latency-us = <400>;

				exit-latency-us = <500>;

				min-residency-us = <4000>;

			};

		};

	};



	extal_clk: extal {