Commit 9a81cc60 authored by Nicholas Kazlauskas's avatar Nicholas Kazlauskas Committed by Alex Deucher
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drm/amd/display: Reset plane when tiling flags change



[Why]
Enabling or disable DCC or switching between tiled and linear formats
can require bandwidth updates.

They're currently skipping all DC validation by being treated as purely
surface updates.

[How]
Treat tiling_flag changes (which encode DCC state) as a condition for
resetting the plane.

Signed-off-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: default avatarHersen Wu <hersenxs.wu@amd.com>
Reviewed-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 707477b0
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+16 −3
Original line number Diff line number Diff line
@@ -8258,6 +8258,8 @@ static bool should_reset_plane(struct drm_atomic_state *state,
	 * TODO: Come up with a more elegant solution for this.
	 */
	for_each_oldnew_plane_in_state(state, other, old_other_state, new_other_state, i) {
		struct dm_plane_state *old_dm_plane_state, *new_dm_plane_state;

		if (other->type == DRM_PLANE_TYPE_CURSOR)
			continue;

@@ -8268,9 +8270,20 @@ static bool should_reset_plane(struct drm_atomic_state *state,
		if (old_other_state->crtc != new_other_state->crtc)
			return true;

		/* TODO: Remove this once we can handle fast format changes. */
		if (old_other_state->fb && new_other_state->fb &&
		    old_other_state->fb->format != new_other_state->fb->format)
		/* Framebuffer checks fall at the end. */
		if (!old_other_state->fb || !new_other_state->fb)
			continue;

		/* Pixel format changes can require bandwidth updates. */
		if (old_other_state->fb->format != new_other_state->fb->format)
			return true;

		old_dm_plane_state = to_dm_plane_state(old_other_state);
		new_dm_plane_state = to_dm_plane_state(new_other_state);

		/* Tiling and DCC changes also require bandwidth updates. */
		if (old_dm_plane_state->tiling_flags !=
		    new_dm_plane_state->tiling_flags)
			return true;
	}