Commit 95eacb24 authored by Rex-BC Chen's avatar Rex-BC Chen Committed by Matthias Brugger
Browse files

arm64: dts: mediatek: Add opp table and clock property for MT8183 cpufreq 



- Add cpufreq opp table.
- Add MediaTek cci opp table.
- Add property of opp table and clock fro cpufreq.

Signed-off-by: default avatarAndrew-sh.Cheng <andrew-sh.cheng@mediatek.com>
Signed-off-by: default avatarRex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220516111130.13325-2-rex-bc.chen@mediatek.com


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent f2906aa8

arch/arm64/boot/dts/mediatek/mt8183-evb.dts

+32 −0
Original line number Diff line number Diff line
@@ -412,6 +412,38 @@ &spi5 { 


};



&cpu0 {

	proc-supply = <&mt6358_vproc12_reg>;

};



&cpu1 {

	proc-supply = <&mt6358_vproc12_reg>;

};



&cpu2 {

	proc-supply = <&mt6358_vproc12_reg>;

};



&cpu3 {

	proc-supply = <&mt6358_vproc12_reg>;

};



&cpu4 {

	proc-supply = <&mt6358_vproc11_reg>;

};



&cpu5 {

	proc-supply = <&mt6358_vproc11_reg>;

};



&cpu6 {

	proc-supply = <&mt6358_vproc11_reg>;

};



&cpu7 {

	proc-supply = <&mt6358_vproc11_reg>;

};



&uart0 {

	status = "okay";

};

arch/arm64/boot/dts/mediatek/mt8183.dtsi

+270 −0
Original line number Diff line number Diff line
@@ -42,6 +42,244 @@ aliases { 
		rdma1 = &rdma1;

	};



	cluster0_opp: opp-table-cluster0 {

		compatible = "operating-points-v2";

		opp-shared;

		opp0-793000000 {

			opp-hz = /bits/ 64 <793000000>;

			opp-microvolt = <650000>;

			required-opps = <&opp2_00>;

		};

		opp0-910000000 {

			opp-hz = /bits/ 64 <910000000>;

			opp-microvolt = <687500>;

			required-opps = <&opp2_01>;

		};

		opp0-1014000000 {

			opp-hz = /bits/ 64 <1014000000>;

			opp-microvolt = <718750>;

			required-opps = <&opp2_02>;

		};

		opp0-1131000000 {

			opp-hz = /bits/ 64 <1131000000>;

			opp-microvolt = <756250>;

			required-opps = <&opp2_03>;

		};

		opp0-1248000000 {

			opp-hz = /bits/ 64 <1248000000>;

			opp-microvolt = <800000>;

			required-opps = <&opp2_04>;

		};

		opp0-1326000000 {

			opp-hz = /bits/ 64 <1326000000>;

			opp-microvolt = <818750>;

			required-opps = <&opp2_05>;

		};

		opp0-1417000000 {

			opp-hz = /bits/ 64 <1417000000>;

			opp-microvolt = <850000>;

			required-opps = <&opp2_06>;

		};

		opp0-1508000000 {

			opp-hz = /bits/ 64 <1508000000>;

			opp-microvolt = <868750>;

			required-opps = <&opp2_07>;

		};

		opp0-1586000000 {

			opp-hz = /bits/ 64 <1586000000>;

			opp-microvolt = <893750>;

			required-opps = <&opp2_08>;

		};

		opp0-1625000000 {

			opp-hz = /bits/ 64 <1625000000>;

			opp-microvolt = <906250>;

			required-opps = <&opp2_09>;

		};

		opp0-1677000000 {

			opp-hz = /bits/ 64 <1677000000>;

			opp-microvolt = <931250>;

			required-opps = <&opp2_10>;

		};

		opp0-1716000000 {

			opp-hz = /bits/ 64 <1716000000>;

			opp-microvolt = <943750>;

			required-opps = <&opp2_11>;

		};

		opp0-1781000000 {

			opp-hz = /bits/ 64 <1781000000>;

			opp-microvolt = <975000>;

			required-opps = <&opp2_12>;

		};

		opp0-1846000000 {

			opp-hz = /bits/ 64 <1846000000>;

			opp-microvolt = <1000000>;

			required-opps = <&opp2_13>;

		};

		opp0-1924000000 {

			opp-hz = /bits/ 64 <1924000000>;

			opp-microvolt = <1025000>;

			required-opps = <&opp2_14>;

		};

		opp0-1989000000 {

			opp-hz = /bits/ 64 <1989000000>;

			opp-microvolt = <1050000>;

			required-opps = <&opp2_15>;

		};	};



	cluster1_opp: opp-table-cluster1 {

		compatible = "operating-points-v2";

		opp-shared;

		opp1-793000000 {

			opp-hz = /bits/ 64 <793000000>;

			opp-microvolt = <700000>;

			required-opps = <&opp2_00>;

		};

		opp1-910000000 {

			opp-hz = /bits/ 64 <910000000>;

			opp-microvolt = <725000>;

			required-opps = <&opp2_01>;

		};

		opp1-1014000000 {

			opp-hz = /bits/ 64 <1014000000>;

			opp-microvolt = <750000>;

			required-opps = <&opp2_02>;

		};

		opp1-1131000000 {

			opp-hz = /bits/ 64 <1131000000>;

			opp-microvolt = <775000>;

			required-opps = <&opp2_03>;

		};

		opp1-1248000000 {

			opp-hz = /bits/ 64 <1248000000>;

			opp-microvolt = <800000>;

			required-opps = <&opp2_04>;

		};

		opp1-1326000000 {

			opp-hz = /bits/ 64 <1326000000>;

			opp-microvolt = <825000>;

			required-opps = <&opp2_05>;

		};

		opp1-1417000000 {

			opp-hz = /bits/ 64 <1417000000>;

			opp-microvolt = <850000>;

			required-opps = <&opp2_06>;

		};

		opp1-1508000000 {

			opp-hz = /bits/ 64 <1508000000>;

			opp-microvolt = <875000>;

			required-opps = <&opp2_07>;

		};

		opp1-1586000000 {

			opp-hz = /bits/ 64 <1586000000>;

			opp-microvolt = <900000>;

			required-opps = <&opp2_08>;

		};

		opp1-1625000000 {

			opp-hz = /bits/ 64 <1625000000>;

			opp-microvolt = <912500>;

			required-opps = <&opp2_09>;

		};

		opp1-1677000000 {

			opp-hz = /bits/ 64 <1677000000>;

			opp-microvolt = <931250>;

			required-opps = <&opp2_10>;

		};

		opp1-1716000000 {

			opp-hz = /bits/ 64 <1716000000>;

			opp-microvolt = <950000>;

			required-opps = <&opp2_11>;

		};

		opp1-1781000000 {

			opp-hz = /bits/ 64 <1781000000>;

			opp-microvolt = <975000>;

			required-opps = <&opp2_12>;

		};

		opp1-1846000000 {

			opp-hz = /bits/ 64 <1846000000>;

			opp-microvolt = <1000000>;

			required-opps = <&opp2_13>;

		};

		opp1-1924000000 {

			opp-hz = /bits/ 64 <1924000000>;

			opp-microvolt = <1025000>;

			required-opps = <&opp2_14>;

		};

		opp1-1989000000 {

			opp-hz = /bits/ 64 <1989000000>;

			opp-microvolt = <1050000>;

			required-opps = <&opp2_15>;

		};

	};



	cci_opp: opp-table-cci {

		compatible = "operating-points-v2";

		opp-shared;

		opp2_00: opp-273000000 {

			opp-hz = /bits/ 64 <273000000>;

			opp-microvolt = <650000>;

		};

		opp2_01: opp-338000000 {

			opp-hz = /bits/ 64 <338000000>;

			opp-microvolt = <687500>;

		};

		opp2_02: opp-403000000 {

			opp-hz = /bits/ 64 <403000000>;

			opp-microvolt = <718750>;

		};

		opp2_03: opp-463000000 {

			opp-hz = /bits/ 64 <463000000>;

			opp-microvolt = <756250>;

		};

		opp2_04: opp-546000000 {

			opp-hz = /bits/ 64 <546000000>;

			opp-microvolt = <800000>;

		};

		opp2_05: opp-624000000 {

			opp-hz = /bits/ 64 <624000000>;

			opp-microvolt = <818750>;

		};

		opp2_06: opp-689000000 {

			opp-hz = /bits/ 64 <689000000>;

			opp-microvolt = <850000>;

		};

		opp2_07: opp-767000000 {

			opp-hz = /bits/ 64 <767000000>;

			opp-microvolt = <868750>;

		};

		opp2_08: opp-845000000 {

			opp-hz = /bits/ 64 <845000000>;

			opp-microvolt = <893750>;

		};

		opp2_09: opp-871000000 {

			opp-hz = /bits/ 64 <871000000>;

			opp-microvolt = <906250>;

		};

		opp2_10: opp-923000000 {

			opp-hz = /bits/ 64 <923000000>;

			opp-microvolt = <931250>;

		};

		opp2_11: opp-962000000 {

			opp-hz = /bits/ 64 <962000000>;

			opp-microvolt = <943750>;

		};

		opp2_12: opp-1027000000 {

			opp-hz = /bits/ 64 <1027000000>;

			opp-microvolt = <975000>;

		};

		opp2_13: opp-1092000000 {

			opp-hz = /bits/ 64 <1092000000>;

			opp-microvolt = <1000000>;

		};

		opp2_14: opp-1144000000 {

			opp-hz = /bits/ 64 <1144000000>;

			opp-microvolt = <1025000>;

		};

		opp2_15: opp-1196000000 {

			opp-hz = /bits/ 64 <1196000000>;

			opp-microvolt = <1050000>;

		};

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;
@@ -85,6 +323,10 @@ cpu0: cpu@0 { 
			enable-method = "psci";

			capacity-dmips-mhz = <741>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP0>;

			clocks = <&mcucfg CLK_MCU_MP0_SEL>,

				 <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>;

			clock-names = "cpu", "intermediate";

			operating-points-v2 = <&cluster0_opp>;

			dynamic-power-coefficient = <84>;

			#cooling-cells = <2>;

		};
@@ -96,6 +338,10 @@ cpu1: cpu@1 { 
			enable-method = "psci";

			capacity-dmips-mhz = <741>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP0>;

			clocks = <&mcucfg CLK_MCU_MP0_SEL>,

				 <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>;

			clock-names = "cpu", "intermediate";

			operating-points-v2 = <&cluster0_opp>;

			dynamic-power-coefficient = <84>;

			#cooling-cells = <2>;

		};
@@ -107,6 +353,10 @@ cpu2: cpu@2 { 
			enable-method = "psci";

			capacity-dmips-mhz = <741>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP0>;

			clocks = <&mcucfg CLK_MCU_MP0_SEL>,

				 <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>;

			clock-names = "cpu", "intermediate";

			operating-points-v2 = <&cluster0_opp>;

			dynamic-power-coefficient = <84>;

			#cooling-cells = <2>;

		};
@@ -118,6 +368,10 @@ cpu3: cpu@3 { 
			enable-method = "psci";

			capacity-dmips-mhz = <741>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP0>;

			clocks = <&mcucfg CLK_MCU_MP0_SEL>,

				 <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>;

			clock-names = "cpu", "intermediate";

			operating-points-v2 = <&cluster0_opp>;

			dynamic-power-coefficient = <84>;

			#cooling-cells = <2>;

		};
@@ -129,6 +383,10 @@ cpu4: cpu@100 { 
			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP1>;

			clocks = <&mcucfg CLK_MCU_MP2_SEL>,

				 <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>;

			clock-names = "cpu", "intermediate";

			operating-points-v2 = <&cluster1_opp>;

			dynamic-power-coefficient = <211>;

			#cooling-cells = <2>;

		};
@@ -140,6 +398,10 @@ cpu5: cpu@101 { 
			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP1>;

			clocks = <&mcucfg CLK_MCU_MP2_SEL>,

				 <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>;

			clock-names = "cpu", "intermediate";

			operating-points-v2 = <&cluster1_opp>;

			dynamic-power-coefficient = <211>;

			#cooling-cells = <2>;

		};
@@ -151,6 +413,10 @@ cpu6: cpu@102 { 
			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP1>;

			clocks = <&mcucfg CLK_MCU_MP2_SEL>,

				 <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>;

			clock-names = "cpu", "intermediate";

			operating-points-v2 = <&cluster1_opp>;

			dynamic-power-coefficient = <211>;

			#cooling-cells = <2>;

		};
@@ -162,6 +428,10 @@ cpu7: cpu@103 { 
			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP1>;

			clocks = <&mcucfg CLK_MCU_MP2_SEL>,

				 <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>;

			clock-names = "cpu", "intermediate";

			operating-points-v2 = <&cluster1_opp>;

			dynamic-power-coefficient = <211>;

			#cooling-cells = <2>;

		};