staging: brcm80211: moved typedefs to decrease header file dependencies (939e1ef5) · Commits · github.com / kvm-riscv / linux

drivers/staging/brcm80211/brcmsmac/aiutils.h

+6 −4

Original line number	Diff line number	Diff line
		@@ -17,6 +17,8 @@
		#ifndef _BRCM_AIUTILS_H_
		#define _BRCM_AIUTILS_H_

		#include "types.h"

		/*
		* SOC Interconnect Address Map.
		* All regions may not exist on all chips.
		@@ -448,16 +450,16 @@ typedef u32(si_intrsoff_t) (void intr_arg);
		typedef void (si_intrsrestore_t) (void intr_arg, u32 arg);
		typedef bool(si_intrsenabled_t) (void intr_arg);

		typedef struct gpioh_item {
		struct gpioh_item {
		void *arg;
		bool level;
		gpio_handler_t handler;
		u32 event;
		struct gpioh_item *next;
		} gpioh_item_t;
		};

		/* misc si info needed by some of the routines */
		typedef struct si_info {
		struct si_info {
		struct si_pub pub; /* back plane public state (must be first) */
		void pbus; / handle to bus (pci/sdio/..) */
		uint dev_coreid; /* the core provides driver functions */
		@@ -494,7 +496,7 @@ typedef struct si_info {
		u32 cia[SI_MAXCORES]; /* erom cia entry for each core */
		u32 cib[SI_MAXCORES]; /* erom cia entry for each core */
		u32 oob_router; /* oob router registers for axi */
		} si_info_t;
		};

		/* AMBA Interconnect exported externs */
		extern void ai_scan(struct si_pub sih, void regs, uint devid);

drivers/staging/brcm80211/brcmsmac/bmac.h

+2 −2

Original line number	Diff line number	Diff line
		@@ -18,10 +18,10 @@

		/* dup state between BMAC(struct wlc_hw_info) and HIGH(struct wlc_info)
		driver */
		typedef struct wlc_bmac_state {
		struct wlc_bmac_state {
		u32 machwcap; /* mac hw capibility */
		u32 preamble_ovr; /* preamble override */
		} wlc_bmac_state_t;
		};

		enum {
		IOV_BMAC_DIAG,

drivers/staging/brcm80211/brcmsmac/channel.h

+4 −8

Original line number	Diff line number	Diff line
		@@ -58,7 +58,7 @@ struct wlc_info;
		#define IS_SINGLEBAND_5G(device) 0

		/* locale channel and power info. */
		typedef struct {
		struct locale_info {
		u32 valid_channels;
		u8 radar_channels; /* List of radar sensitive channels */
		u8 restricted_channels; /* List of channels used only if APs are detected */
		@@ -67,7 +67,7 @@ typedef struct {
		* per sub-band
		*/
		u8 flags;
		} locale_info_t;
		};

		/* bits for locale_info flags */
		#define WLC_PEAK_CONDUCTED 0x00 /* Peak for locals */
		@@ -86,11 +86,11 @@ typedef struct {
		* maxpwr arrays are index by channel for 2.4 GHz limits, and
		* by sub-band for 5 GHz limits using CHANNEL_POWER_IDX_5G(channel)
		*/
		typedef struct {
		struct locale_mimo_info {
		s8 maxpwr20[WLC_MAXPWR_MIMO_TBL_SIZE]; /* tx 20 MHz power limits, qdBm units */
		s8 maxpwr40[WLC_MAXPWR_MIMO_TBL_SIZE]; /* tx 40 MHz power limits, qdBm units */
		u8 flags;
		} locale_mimo_info_t;
		};

		extern const chanvec_t chanvec_all_2G;
		extern const chanvec_t chanvec_all_5G;
		@@ -105,10 +105,6 @@ struct country_info {
		const u8 locale_mimo_5G; /* 5G mimo info */
		};

		typedef struct country_info country_info_t;

		typedef struct wlc_cm_info wlc_cm_info_t;

		extern wlc_cm_info_t wlc_channel_mgr_attach(struct wlc_info wlc);
		extern void wlc_channel_mgr_detach(wlc_cm_info_t *wlc_cm);

drivers/staging/brcm80211/brcmsmac/d11.h

+22 −29

Original line number	Diff line number	Diff line
		@@ -49,10 +49,10 @@
		#error "WL_RSSI_ANT_MAX does not match"
		#endif

		typedef volatile struct {
		struct intctrlregs {
		u32 intstatus;
		u32 intmask;
		} intctrlregs_t;
		};

		/* PIO structure,
		* support two PIO format: 2 bytes access and 4 bytes access
		@@ -60,53 +60,53 @@ typedef volatile struct {
		* a pair of channels is defined for convenience
		*/
		/* 2byte-wide pio register set per channel(xmt or rcv) */
		typedef volatile struct {
		struct pio2regs {
		u16 fifocontrol;
		u16 fifodata;
		u16 fifofree; /* only valid in xmt channel, not in rcv channel */
		u16 PAD;
		} pio2regs_t;
		};

		/* a pair of pio channels(tx and rx) */
		typedef volatile struct {
		struct pio2regp {
		pio2regs_t tx;
		pio2regs_t rx;
		} pio2regp_t;
		};

		/* 4byte-wide pio register set per channel(xmt or rcv) */
		typedef volatile struct {
		struct pio4regs {
		u32 fifocontrol;
		u32 fifodata;
		} pio4regs_t;
		};

		/* a pair of pio channels(tx and rx) */
		typedef volatile struct {
		struct pio4regp {
		pio4regs_t tx;
		pio4regs_t rx;
		} pio4regp_t;
		};

		/* read: 32-bit register that can be read as 32-bit or as 2 16-bit
		* write: only low 16b-it half can be written
		*/
		typedef volatile union {
		union pmqreg {
		u32 pmqhostdata; /* read only! */
		struct {
		u16 pmqctrlstatus; /* read/write */
		u16 PAD;
		} w;
		} pmqreg_t;
		};

		typedef volatile struct {
		struct fifo64 {
		dma64regs_t dmaxmt; /* dma tx */
		pio4regs_t piotx; /* pio tx */
		dma64regs_t dmarcv; /* dma rx */
		pio4regs_t piorx; /* pio rx */
		} fifo64_t;
		};

		/*
		* Host Interface Registers
		*/
		typedef volatile struct _d11regs {
		struct d11regs {
		/* Device Control ("semi-standard host registers") */
		u32 PAD[3]; /* 0x0 - 0x8 */
		u32 biststatus; /* 0xC */
		@@ -430,7 +430,7 @@ typedef volatile struct _d11regs {

		/* SHM // 0x800 - 0xEFE */
		u16 PAD[0x380]; /* 0x800 - 0xEFE */
		} d11regs_t;
		};

		#define PIHR_BASE 0x0400 /* byte address of packed IHR region */

		@@ -617,7 +617,6 @@ typedef volatile struct _d11regs {
		#define ANA_11N_013 5

		/* 802.11a PLCP header def */
		typedef struct ofdm_phy_hdr ofdm_phy_hdr_t;
		struct ofdm_phy_hdr {
		u8 rlpt[3]; /* rate, length, parity, tail */
		u16 service;
		@@ -652,7 +651,6 @@ struct ofdm_phy_hdr {
		#define D11A_PHY_PREHDR_TIME (D11A_PHY_PRE_TIME + D11A_PHY_HDR_TIME)

		/* 802.11b PLCP header def */
		typedef struct cck_phy_hdr cck_phy_hdr_t;
		struct cck_phy_hdr {
		u8 signal;
		u8 service;
		@@ -698,7 +696,6 @@ struct cck_phy_hdr {
		#define D11_PHY_HDR_LEN 6

		/* TX DMA buffer header */
		typedef struct d11txh d11txh_t;
		struct d11txh {
		u16 MacTxControlLow; /* 0x0 */
		u16 MacTxControlHigh; /* 0x1 */
		@@ -842,7 +839,6 @@ struct d11txh {
		#define ABI_MAS_MRT_ANT_PTN_MASK 0x000f

		/* tx status packet */
		typedef struct tx_status tx_status_t;
		struct tx_status {
		u16 framelen;
		u16 PAD;
		@@ -1235,7 +1231,6 @@ struct tx_status {
		#define MIMO_ANTSEL_WAIT 50 /* 50us wait */
		#define MIMO_ANTSEL_OVERRIDE 0x8000 /* flag */

		typedef struct shm_acparams shm_acparams_t;
		struct shm_acparams {
		u16 txop;
		u16 cwmin;
		@@ -1294,7 +1289,6 @@ struct shm_acparams {
		#define PHY_NOISE_MASK 0x00ff

		/* Receive Frame Data Header for 802.11b DCF-only frames */
		typedef struct d11rxhdr d11rxhdr_t;
		struct d11rxhdr {
		u16 RxFrameSize; /* Actual byte length of the frame data received */
		u16 PAD;
		@@ -1313,7 +1307,6 @@ struct d11rxhdr {
		#define RXHDR_LEN 24 /* sizeof d11rxhdr_t */
		#define FRAMELEN(h) ((h)->RxFrameSize)

		typedef struct wlc_d11rxhdr wlc_d11rxhdr_t;
		struct wlc_d11rxhdr {
		d11rxhdr_t rxhdr;
		u32 tsf_l; /* TSF_L reading */
		@@ -1461,7 +1454,7 @@ struct wlc_d11rxhdr {
		#define DBGST_ASLEEP 4 /* asleep (PS mode) */

		/* Scratch Reg defs */
		typedef enum {
		enum _ePsmScratchPadRegDefinitions {
		S_RSV0 = 0,
		S_RSV1,
		S_RSV2,
		@@ -1539,7 +1532,7 @@ typedef enum {
		S_MFGTEST_TMP0, /* Temp register used for RX test calculations 0x3D */
		S_RXESN, /* Received end sequence number for A-MPDU BA 0x3E */
		S_STREG6, /* 0x3F */
		} ePsmScratchPadRegDefinitions;
		};

		#define S_BEACON_INDX S_OLD_BREM
		#define S_PRS_INDX S_OLD_CWWIN
		@@ -1551,7 +1544,7 @@ typedef enum {
		#define SLOW_CTRL_FD (1 << 8)

		/* ucode mac statistic counters in shared memory */
		typedef struct macstat {
		struct macstat {
		u16 txallfrm; /* 0x80 */
		u16 txrtsfrm; /* 0x82 */
		u16 txctsfrm; /* 0x84 */
		@@ -1609,7 +1602,7 @@ typedef struct macstat {
		u16 phywatchdog; /* 0xfa # of phy watchdog events */
		u16 PAD;
		u16 bphy_badplcp; /* bphy bad plcp */
		} macstat_t;
		};

		/* dot11 core-specific control flags */
		#define SICF_PCLKE 0x0004 /* PHY clock enable */
		@@ -1758,7 +1751,7 @@ typedef struct macstat {
		#define SHM_BYT_CNT 0x2 /* IHR location */
		#define MAX_BYT_CNT 0x600 /* Maximum frame len */

		typedef struct d11cnt {
		struct d11cnt {
		u32 txfrag;
		u32 txmulti;
		u32 txfail;
		@@ -1773,6 +1766,6 @@ typedef struct d11cnt {
		u32 rxcrc;
		u32 txfrmsnt;
		u32 rxundec;
		} d11cnt_t;
		};

		#endif /* _BRCM_D11_H_ */

drivers/staging/brcm80211/brcmsmac/dma.h

+8 −8

Original line number	Diff line number	Diff line
		@@ -32,24 +32,24 @@ struct dma_pub;

		/* 32 bits addressing */

		typedef volatile struct { /* diag access */
		struct dma32diag { /* diag access */
		u32 fifoaddr; /* diag address */
		u32 fifodatalow; /* low 32bits of data */
		u32 fifodatahigh; /* high 32bits of data */
		u32 pad; /* reserved */
		} dma32diag_t;
		};

		/* 64 bits addressing */

		/* dma registers per channel(xmt or rcv) */
		typedef volatile struct {
		struct dma64regs {
		u32 control; /* enable, et al */
		u32 ptr; /* last descriptor posted to chip */
		u32 addrlow; /* descriptor ring base address low 32-bits (8K aligned) */
		u32 addrhigh; /* descriptor ring base address bits 63:32 (8K aligned) */
		u32 status0; /* current descriptor, xmt state */
		u32 status1; /* active descriptor, xmt error */
		} dma64regs_t;
		};

		/* map/unmap direction */
		#define DMA_TX 1 /* TX direction for DMA */
		@@ -57,11 +57,11 @@ typedef volatile struct {
		#define BUS_SWAP32(v) (v)

		/* range param for dma_getnexttxp() and dma_txreclaim */
		typedef enum txd_range {
		enum txd_range {
		DMA_RANGE_ALL = 1,
		DMA_RANGE_TRANSMITTED,
		DMA_RANGE_TRANSFERED
		} txd_range_t;
		};

		/* dma function type */
		typedef void (di_detach_t) (struct dma_pub dmah);
		@@ -114,7 +114,7 @@ typedef uint(di_txpending_t) (struct dma_pub dmah);
		typedef uint(di_txcommitted_t) (struct dma_pub dmah);

		/* dma opsvec */
		typedef struct di_fcn_s {
		struct di_fcn_s {
		di_detach_t detach;
		di_txinit_t txinit;
		di_txreset_t txreset;
		@@ -159,7 +159,7 @@ typedef struct di_fcn_s {
		di_txpending_t txpending;
		di_txcommitted_t txcommitted;
		uint endnum;
		} di_fcn_t;
		};

		/*
		* Exported data structure (read-only)