Commit 8dec2fc1 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Nuke CACHE_MODE_0 save/restore 



The CACHE_MODE_0 save/restore was added without explanation in
commit 1f84e550 ("drm/i915 more registers for S3 (DSPCLK_GATE_D,
CACHE_MODE_0, MI_ARB_STATE)"). If there are any bits we care about
those should be set explicitly during some appropriate init function.
Let's assume it's all good and just nuke this magic save/restore.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200908140210.31048-4-ville.syrjala@linux.intel.com


Acked-by: default avatarJani Nikula <jani.nikula@intel.com>
parent b41e58ff

drivers/gpu/drm/i915/i915_drv.h

+0 −1
Original line number Diff line number Diff line
@@ -537,7 +537,6 @@ struct intel_gmbus { 


struct i915_suspend_saved_registers {

	u32 saveDSPARB;

	u32 saveCACHE_MODE_0;

	u32 saveSWF0[16];

	u32 saveSWF1[16];

	u32 saveSWF3[3];

drivers/gpu/drm/i915/i915_suspend.c

+0 −9
Original line number Diff line number Diff line
@@ -71,10 +71,6 @@ int i915_save_state(struct drm_i915_private *dev_priv) 


	i915_save_display(dev_priv);



	/* Cache mode state */

	if (INTEL_GEN(dev_priv) < 7)

		dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);



	/* Scratch space */

	if (IS_GEN(dev_priv, 2) && IS_MOBILE(dev_priv)) {

		for (i = 0; i < 7; i++) {
@@ -104,11 +100,6 @@ int i915_restore_state(struct drm_i915_private *dev_priv) 


	i915_restore_display(dev_priv);



	/* Cache mode state */

	if (INTEL_GEN(dev_priv) < 7)

		I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 |

			   0xffff0000);



	/* Scratch space */

	if (IS_GEN(dev_priv, 2) && IS_MOBILE(dev_priv)) {

		for (i = 0; i < 7; i++) {