Commit 8d880552 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

pinctrl: renesas: Reformat macros defining struct initializers 



Reformat all macros that define structure initializers, to visually
resemble structure definitions:
  - Move the opening curly brace to the previous line,
  - Move the closing curly brace to the first position,
  - Reduce indentation of the block to a single TAB, decreasing the need
    for line breaks,
  - Align backslashes for line continuation to the last TAB block where
    possible,

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/03a1eed3c4f57d7b14ef53ab49e04de10d0e383c.1640269757.git.geert+renesas@glider.be
parent c614d12c

drivers/pinctrl/renesas/sh_pfc.h

+54 −61
Original line number Diff line number Diff line
@@ -49,8 +49,7 @@ struct sh_pfc_pin { 
	u16 enum_id;

};



#define SH_PFC_PIN_GROUP_ALIAS(alias, n)		\

	{						\

#define SH_PFC_PIN_GROUP_ALIAS(alias, n) {				\

	.name = #alias,							\

	.pins = n##_pins,						\

	.mux = n##_mux,							\
@@ -72,8 +71,7 @@ struct sh_pfc_pin_group { 
 * in this case. It accepts an optional 'version' argument used when the

 * same group can appear on a different set of pins.

 */

#define VIN_DATA_PIN_GROUP(n, s, ...)					\

	{								\

#define VIN_DATA_PIN_GROUP(n, s, ...) {					\

	.name = #n#s#__VA_ARGS__,					\

	.pins = n##__VA_ARGS__##_pins.data##s,				\

	.mux = n##__VA_ARGS__##_mux.data##s,				\
@@ -103,8 +101,7 @@ union vin_data { 
	unsigned int data4[4];

};



#define SH_PFC_FUNCTION(n)				\

	{						\

#define SH_PFC_FUNCTION(n) {						\

	.name = #n,							\

	.groups = n##_groups,						\

	.nr_groups = ARRAY_SIZE(n##_groups),				\
@@ -231,8 +228,9 @@ struct pinmux_irq { 
 * Describe the mapping from GPIOs to a single IRQ

 *   - ids...: List of GPIOs that are mapped to the same IRQ

 */

#define PINMUX_IRQ(ids...)			   \

	{ .gpios = (const short []) { ids, -1 } }

#define PINMUX_IRQ(ids...) {						\

	.gpios = (const short []) { ids, -1 }				\

}



struct pinmux_range {

	u16 begin;
@@ -624,8 +622,7 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info; 
#define GP_ALL(str)			CPU_ALL_GP(_GP_ALL, str)



/* PINMUX_GPIO_GP_ALL - Expand to a list of sh_pfc_pin entries */

#define _GP_GPIO(bank, _pin, _name, sfx, cfg)				\

	{								\

#define _GP_GPIO(bank, _pin, _name, sfx, cfg) {				\

	.pin = (bank * 32) + _pin,					\

	.name = __stringify(_name),					\

	.enum_id = _name##_DATA,					\
@@ -688,8 +685,7 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info; 
	}



/* SH_PFC_PIN_CFG - Expand to a sh_pfc_pin entry (named PORT#) with config */

#define SH_PFC_PIN_CFG(_pin, cfgs)					\

	{								\

#define SH_PFC_PIN_CFG(_pin, cfgs) {					\

	.pin = _pin,							\

	.name = __stringify(PORT##_pin),				\

	.enum_id = PORT##_pin##_DATA,					\
@@ -743,8 +739,7 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info; 
#define NOGP_ALL()				CPU_ALL_NOGP(_NOGP_ALL)



/* PINMUX_NOGP_ALL - Expand to a list of sh_pfc_pin entries */

#define _NOGP_PINMUX(_pin, _name, cfg)					\

	{								\

#define _NOGP_PINMUX(_pin, _name, cfg) {				\

	.pin = PIN_##_pin,						\

	.name = "PIN_" _name,						\

	.configs = SH_PFC_PIN_CFG_NO_GPIO | cfg,			\
@@ -754,10 +749,8 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info; 
/*

 * PORTnCR helper macro for SH-Mobile/R-Mobile

 */

#define PORTCR(nr, reg)							\

	{								\

		PINMUX_CFG_REG_VAR("PORT" nr "CR", reg, 8,		\

				   GROUP(2, 2, 1, 3),			\

#define PORTCR(nr, reg) {						\

	PINMUX_CFG_REG_VAR("PORT" nr "CR", reg, 8, GROUP(2, 2, 1, 3),	\

			   GROUP(					\

		/* PULMD[1:0], handled by .set_bias() */		\

		0, 0, 0, 0,						\