Commit 8a169ed4 authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

x86/cpu: Move cpu_die_id into topology info 



Move the next member.

No functional change.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Tested-by: default avatarJuergen Gross <jgross@suse.com>
Tested-by: default avatarSohil Mehta <sohil.mehta@intel.com>
Tested-by: default avatarMichael Kelley <mikelley@microsoft.com>
Tested-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: default avatarZhang Rui <rui.zhang@intel.com>
Acked-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20230814085112.388185134@linutronix.de
parent 02fb601d

Documentation/arch/x86/topology.rst

+2 −2
Original line number Diff line number Diff line
@@ -55,7 +55,7 @@ Package-related topology information in the kernel: 


    The number of dies in a package. This information is retrieved via CPUID.



  - cpuinfo_x86.cpu_die_id:

  - cpuinfo_x86.topo.die_id:



    The physical ID of the die. This information is retrieved via CPUID.
@@ -65,7 +65,7 @@ Package-related topology information in the kernel: 
    and deduced from the APIC IDs of the cores in the package.



    Modern systems use this value for the socket. There may be multiple

    packages within a socket. This value may differ from cpu_die_id.

    packages within a socket. This value may differ from topo.die_id.



  - cpuinfo_x86.logical_proc_id:

arch/x86/include/asm/processor.h

+3 −1
Original line number Diff line number Diff line
@@ -86,6 +86,9 @@ struct cpuinfo_topology { 


	// Physical package ID

	u32			pkg_id;



	// Physical die ID on AMD, Relative on Intel

	u32			die_id;

};



struct cpuinfo_x86 {
@@ -141,7 +144,6 @@ struct cpuinfo_x86 { 
	u16			logical_proc_id;

	/* Core id: */

	u16			cpu_core_id;

	u16			cpu_die_id;

	u16			logical_die_id;

	/* Index into per_cpu list: */

	u16			cpu_index;

arch/x86/include/asm/topology.h

+1 −1
Original line number Diff line number Diff line
@@ -108,7 +108,7 @@ extern const struct cpumask *cpu_clustergroup_mask(int cpu); 
#define topology_logical_package_id(cpu)	(cpu_data(cpu).logical_proc_id)

#define topology_physical_package_id(cpu)	(cpu_data(cpu).topo.pkg_id)

#define topology_logical_die_id(cpu)		(cpu_data(cpu).logical_die_id)

#define topology_die_id(cpu)			(cpu_data(cpu).cpu_die_id)

#define topology_die_id(cpu)			(cpu_data(cpu).topo.die_id)

#define topology_core_id(cpu)			(cpu_data(cpu).cpu_core_id)

#define topology_ppin(cpu)			(cpu_data(cpu).ppin)

arch/x86/kernel/cpu/amd.c

+4 −4
Original line number Diff line number Diff line
@@ -410,7 +410,7 @@ static void amd_get_topology(struct cpuinfo_x86 *c) 


		cpuid(0x8000001e, &eax, &ebx, &ecx, &edx);



		c->cpu_die_id  = ecx & 0xff;

		c->topo.die_id  = ecx & 0xff;



		if (c->x86 == 0x15)

			c->cu_id = ebx & 0xff;
@@ -436,9 +436,9 @@ static void amd_get_topology(struct cpuinfo_x86 *c) 
		u64 value;



		rdmsrl(MSR_FAM10H_NODE_ID, value);

		c->cpu_die_id = value & 7;

		c->topo.die_id = value & 7;



		per_cpu(cpu_llc_id, cpu) = c->cpu_die_id;

		per_cpu(cpu_llc_id, cpu) = c->topo.die_id;

	} else

		return;
@@ -463,7 +463,7 @@ static void amd_detect_cmp(struct cpuinfo_x86 *c) 
	/* Convert the initial APIC ID into the socket ID */

	c->topo.pkg_id = c->topo.initial_apicid >> bits;

	/* use socket ID also for last level cache */

	per_cpu(cpu_llc_id, cpu) = c->cpu_die_id = c->topo.pkg_id;

	per_cpu(cpu_llc_id, cpu) = c->topo.die_id = c->topo.pkg_id;

}



u32 amd_get_nodes_per_socket(void)

arch/x86/kernel/cpu/cacheinfo.c

+1 −1
Original line number Diff line number Diff line
@@ -672,7 +672,7 @@ void cacheinfo_amd_init_llc_id(struct cpuinfo_x86 *c, int cpu) 


	if (c->x86 < 0x17) {

		/* LLC is at the node level. */

		per_cpu(cpu_llc_id, cpu) = c->cpu_die_id;

		per_cpu(cpu_llc_id, cpu) = c->topo.die_id;

	} else if (c->x86 == 0x17 && c->x86_model <= 0x1F) {

		/*

		 * LLC is at the core complex level.