Commit 88fc274c authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Bjorn Andersson
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ARM: dts: qcom: sdx65: fix SDHCI clocks order 



Bindings expect clocks to be in different order:

  qcom-sdx65-mtp.dtb: mmc@8804000: clock-names:0: 'iface' was expected
  qcom-sdx65-mtp.dtb: mmc@8804000: clock-names:1: 'core' was expected

Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230924183335.49961-2-krzysztof.kozlowski@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 83daed13

arch/arm/boot/dts/qcom/qcom-sdx65.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -466,9 +466,9 @@ sdhc_1: mmc@8804000 { 
			interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "hc_irq", "pwr_irq";

			clocks = <&gcc GCC_SDCC1_APPS_CLK>,

				 <&gcc GCC_SDCC1_AHB_CLK>;

			clock-names = "core", "iface";

			clocks = <&gcc GCC_SDCC1_AHB_CLK>,

				 <&gcc GCC_SDCC1_APPS_CLK>;

			clock-names = "iface", "core";

			status = "disabled";

		};