Commit 848c82db authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

arm64: dts: renesas: r8a779g0: Add RAVB nodes 



Add device nodes for the Renesas Ethernet AVB (EtherAVB-IF) blocks on
the Renesas R-Car V4H (R8A779G0) SoC.

Based on a larger patch in the BSP by Takeshi Kihara.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/980e7a62d8dc3a1e2387a2d93a6296625b105506.1662715538.git.geert+renesas@glider.be
parent 6672f840

arch/arm64/boot/dts/renesas/r8a779g0.dtsi

+141 −0
Original line number Diff line number Diff line
@@ -334,6 +334,147 @@ hscif0: serial@e6540000 { 
			status = "disabled";

		};



		avb0: ethernet@e6800000 {

			compatible = "renesas,etheravb-r8a779g0",

				     "renesas,etheravb-rcar-gen4";

			reg = <0 0xe6800000 0 0x800>;

			interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4",

					  "ch5", "ch6", "ch7", "ch8", "ch9",

					  "ch10", "ch11", "ch12", "ch13",

					  "ch14", "ch15", "ch16", "ch17",

					  "ch18", "ch19", "ch20", "ch21",

					  "ch22", "ch23", "ch24";

			clocks = <&cpg CPG_MOD 211>;

			clock-names = "fck";

			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;

			resets = <&cpg 211>;

			phy-mode = "rgmii";

			rx-internal-delay-ps = <0>;

			tx-internal-delay-ps = <0>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		avb1: ethernet@e6810000 {

			compatible = "renesas,etheravb-r8a779g0",

				     "renesas,etheravb-rcar-gen4";

			reg = <0 0xe6810000 0 0x800>;

			interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4",

					  "ch5", "ch6", "ch7", "ch8", "ch9",

					  "ch10", "ch11", "ch12", "ch13",

					  "ch14", "ch15", "ch16", "ch17",

					  "ch18", "ch19", "ch20", "ch21",

					  "ch22", "ch23", "ch24";

			clocks = <&cpg CPG_MOD 212>;

			clock-names = "fck";

			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;

			resets = <&cpg 212>;

			phy-mode = "rgmii";

			rx-internal-delay-ps = <0>;

			tx-internal-delay-ps = <0>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		avb2: ethernet@e6820000 {

			compatible = "renesas,etheravb-r8a779g0",

				     "renesas,etheravb-rcar-gen4";

			reg = <0 0xe6820000 0 0x1000>;

			interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4",

					  "ch5", "ch6", "ch7", "ch8", "ch9",

					  "ch10", "ch11", "ch12", "ch13",

					  "ch14", "ch15", "ch16", "ch17",

					  "ch18", "ch19", "ch20", "ch21",

					  "ch22", "ch23", "ch24";

			clocks = <&cpg CPG_MOD 213>;

			clock-names = "fck";

			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;

			resets = <&cpg 213>;

			phy-mode = "rgmii";

			rx-internal-delay-ps = <0>;

			tx-internal-delay-ps = <0>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		gic: interrupt-controller@f1000000 {

			compatible = "arm,gic-v3";

			#interrupt-cells = <3>;