Loading arch/arm/boot/dts/imx6dl-phytec-mira-rdk-nand.dts +1 −0 Original line number Diff line number Diff line Loading @@ -8,6 +8,7 @@ #include "imx6dl.dtsi" #include "imx6qdl-phytec-phycore-som.dtsi" #include "imx6qdl-phytec-mira.dtsi" #include "imx6qdl-phytec-mira-peb-eval-01.dtsi" / { model = "PHYTEC phyBOARD-Mira DualLite/Solo Carrier-Board with NAND"; Loading arch/arm/boot/dts/imx6q-phytec-mira-rdk-emmc.dts +1 −0 Original line number Diff line number Diff line Loading @@ -8,6 +8,7 @@ #include "imx6q.dtsi" #include "imx6qdl-phytec-phycore-som.dtsi" #include "imx6qdl-phytec-mira.dtsi" #include "imx6qdl-phytec-mira-peb-eval-01.dtsi" / { model = "PHYTEC phyBOARD-Mira Quad Carrier-Board with eMMC"; Loading arch/arm/boot/dts/imx6q-phytec-mira-rdk-nand.dts +1 −0 Original line number Diff line number Diff line Loading @@ -8,6 +8,7 @@ #include "imx6q.dtsi" #include "imx6qdl-phytec-phycore-som.dtsi" #include "imx6qdl-phytec-mira.dtsi" #include "imx6qdl-phytec-mira-peb-eval-01.dtsi" / { model = "PHYTEC phyBOARD-Mira Quad Carrier-Board with NAND"; Loading arch/arm/boot/dts/imx6qdl-phytec-mira-peb-eval-01.dtsi 0 → 100644 +71 −0 Original line number Diff line number Diff line // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (C) 2018 PHYTEC Messtechnik * Author: Christian Hemp <c.hemp@phytec.de> */ #include <dt-bindings/input/input.h> / { gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_keys>; status = "disabled"; power { label = "Power Button"; gpios = <&gpio5 28 GPIO_ACTIVE_LOW>; linux,code = <KEY_WAKEUP>; wakeup-source; }; sleep { label = "Sleep Button"; gpios = <&gpio6 18 GPIO_ACTIVE_LOW>; linux,code = <KEY_SLEEP>; }; }; user_leds: user-leds { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_user_leds>; status = "disabled"; user-led1 { gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; linux,default-trigger = "gpio"; default-state = "on"; }; user-led2 { gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; linux,default-trigger = "gpio"; default-state = "on"; }; user-led3 { gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>; linux,default-trigger = "gpio"; default-state = "on"; }; }; }; &iomuxc { pinctrl_gpio_keys: gpiokeysgrp { fsl,pins = < MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b0 MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x1b0b0 >; }; pinctrl_user_leds: userledsgrp { fsl,pins = < MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b0 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x1b0b0 >; }; }; arch/arm/boot/dts/imx6qp-phytec-mira-rdk-nand.dts +1 −0 Original line number Diff line number Diff line Loading @@ -8,6 +8,7 @@ #include "imx6qp.dtsi" #include "imx6qdl-phytec-phycore-som.dtsi" #include "imx6qdl-phytec-mira.dtsi" #include "imx6qdl-phytec-mira-peb-eval-01.dtsi" / { model = "PHYTEC phyBOARD-Mira QuadPlus Carrier-Board with NAND"; Loading Loading
arch/arm/boot/dts/imx6dl-phytec-mira-rdk-nand.dts +1 −0 Original line number Diff line number Diff line Loading @@ -8,6 +8,7 @@ #include "imx6dl.dtsi" #include "imx6qdl-phytec-phycore-som.dtsi" #include "imx6qdl-phytec-mira.dtsi" #include "imx6qdl-phytec-mira-peb-eval-01.dtsi" / { model = "PHYTEC phyBOARD-Mira DualLite/Solo Carrier-Board with NAND"; Loading
arch/arm/boot/dts/imx6q-phytec-mira-rdk-emmc.dts +1 −0 Original line number Diff line number Diff line Loading @@ -8,6 +8,7 @@ #include "imx6q.dtsi" #include "imx6qdl-phytec-phycore-som.dtsi" #include "imx6qdl-phytec-mira.dtsi" #include "imx6qdl-phytec-mira-peb-eval-01.dtsi" / { model = "PHYTEC phyBOARD-Mira Quad Carrier-Board with eMMC"; Loading
arch/arm/boot/dts/imx6q-phytec-mira-rdk-nand.dts +1 −0 Original line number Diff line number Diff line Loading @@ -8,6 +8,7 @@ #include "imx6q.dtsi" #include "imx6qdl-phytec-phycore-som.dtsi" #include "imx6qdl-phytec-mira.dtsi" #include "imx6qdl-phytec-mira-peb-eval-01.dtsi" / { model = "PHYTEC phyBOARD-Mira Quad Carrier-Board with NAND"; Loading
arch/arm/boot/dts/imx6qdl-phytec-mira-peb-eval-01.dtsi 0 → 100644 +71 −0 Original line number Diff line number Diff line // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (C) 2018 PHYTEC Messtechnik * Author: Christian Hemp <c.hemp@phytec.de> */ #include <dt-bindings/input/input.h> / { gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_keys>; status = "disabled"; power { label = "Power Button"; gpios = <&gpio5 28 GPIO_ACTIVE_LOW>; linux,code = <KEY_WAKEUP>; wakeup-source; }; sleep { label = "Sleep Button"; gpios = <&gpio6 18 GPIO_ACTIVE_LOW>; linux,code = <KEY_SLEEP>; }; }; user_leds: user-leds { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_user_leds>; status = "disabled"; user-led1 { gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; linux,default-trigger = "gpio"; default-state = "on"; }; user-led2 { gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; linux,default-trigger = "gpio"; default-state = "on"; }; user-led3 { gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>; linux,default-trigger = "gpio"; default-state = "on"; }; }; }; &iomuxc { pinctrl_gpio_keys: gpiokeysgrp { fsl,pins = < MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b0 MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x1b0b0 >; }; pinctrl_user_leds: userledsgrp { fsl,pins = < MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b0 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x1b0b0 >; }; };
arch/arm/boot/dts/imx6qp-phytec-mira-rdk-nand.dts +1 −0 Original line number Diff line number Diff line Loading @@ -8,6 +8,7 @@ #include "imx6qp.dtsi" #include "imx6qdl-phytec-phycore-som.dtsi" #include "imx6qdl-phytec-mira.dtsi" #include "imx6qdl-phytec-mira-peb-eval-01.dtsi" / { model = "PHYTEC phyBOARD-Mira QuadPlus Carrier-Board with NAND"; Loading