Commit 20c7b41d authored by Christoph Niedermaier's avatar Christoph Niedermaier Committed by Shawn Guo
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ARM: dts: imx6qdl-dhcom: Add USB overcurrent pin on SoM layer



Add USB overcurrent pin muxing on SoM layer. On DRC02 and PDK2 the USB
overcurrent pin isn't connected, but a USB hub on the board takes care
of the USB overcurrent instead. Therefore disable it there with the
property disable-over-current.

Signed-off-by: default avatarChristoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Reviewed-by: default avatarMarek Vasut <marex@denx.de>
Reviewed-by: default avatarFabio Estevam <festevam@gmail.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 538e5f71
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+4 −0
Original line number Diff line number Diff line
@@ -95,6 +95,10 @@ &uart5 {
	rts-gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>; /* GPIO P */
};

&usbh1 {
	disable-over-current;
};

&usdhc2 { /* SD card */
	status = "okay";
};
+4 −0
Original line number Diff line number Diff line
@@ -260,6 +260,10 @@ &ssi1 {
	status = "okay";
};

&usbh1 {
	disable-over-current;
};

&usdhc2 { /* SD card */
	status = "okay";
};
+1 −0
Original line number Diff line number Diff line
@@ -729,6 +729,7 @@ MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B 0x4001b0b1
	pinctrl_usbh1: usbh1-grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D31__GPIO3_IO31		0x120b0
			MX6QDL_PAD_EIM_D30__USB_H1_OC		0x1b0b1
		>;
	};