Unverified Commit 813b0808 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'samsung-dt64-5.20' of... 

Merge tag 'samsung-dt64-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM64 changes for v5.20

1. Add CPU cache, UFS to Tesla FSD.
2. Add reboot-mode (boot into specific bootloader mode) to ExynosAutov9.
3. Add watchdogs to ExynosAutov9.
4. Add eMMC to Exynos7885 JackpotLTE (Samsung Galaxy A8).
5. DTS cleanup: white-spaces, node names, LED color/function.
6. Switch to DTS-local header for pinctrl register values instead of
   bindings header.  The bindings header is being deprecated because it
   does not reflect the purpose of bindings.

* tag 'samsung-dt64-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: Add internal eMMC support to jackpotlte
  dt-bindings: clock: Add indices for Exynos7885 TREX clocks
  dt-bindings: clock: Add bindings for Exynos7885 CMU_FSYS
  arm64: dts: exynos: enable secondary ufs devices ExynosAutov9 SADK
  arm64: dts: exynos: add secondary ufs devices in ExynosAutov9
  arm64: dts: fsd: use local header for pinctrl register values
  arm64: dts: exynos: use local header for pinctrl register values
  arm64: dts: exynos: align MMC node name with dtschema
  arm64: dts: exynos: adjust DT style of ufs nodes in ExynosAutov9
  arm64: dts: exynos: adjust whitespace around '='
  arm64: dts: fsd: add ufs device node
  arm64: dts: exynos: add watchdog in ExynosAutov9
  arm64: dts: exynos: add syscon reboot/reboot_mode support in ExynosAutov9
  dt-bindings: soc: add samsung,boot-mode definitions
  arm64: dts: fsd: Add cpu cache information

Link: https://lore.kernel.org/r/20220624080746.31947-2-krzysztof.kozlowski@linaro.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 7949803d 1a4f20ca

Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml

+27 −0
Original line number Diff line number Diff line
@@ -33,6 +33,7 @@ properties: 
    enum:

      - samsung,exynos7885-cmu-top

      - samsung,exynos7885-cmu-core

      - samsung,exynos7885-cmu-fsys

      - samsung,exynos7885-cmu-peri



  clocks:
@@ -88,6 +89,32 @@ allOf: 
            - const: dout_core_cci

            - const: dout_core_g3d



  - if:

      properties:

        compatible:

          contains:

            const: samsung,exynos7885-cmu-fsys



    then:

      properties:

        clocks:

          items:

            - description: External reference clock (26 MHz)

            - description: CMU_FSYS bus clock (from CMU_TOP)

            - description: MMC_CARD clock (from CMU_TOP)

            - description: MMC_EMBD clock (from CMU_TOP)

            - description: MMC_SDIO clock (from CMU_TOP)

            - description: USB30DRD clock (from CMU_TOP)



        clock-names:

          items:

            - const: oscclk

            - const: dout_fsys_bus

            - const: dout_fsys_mmc_card

            - const: dout_fsys_mmc_embd

            - const: dout_fsys_mmc_sdio

            - const: dout_fsys_usb30drd



  - if:

      properties:

        compatible:

arch/arm64/boot/dts/exynos/exynos-pinctrl.h

0 → 100644
+79 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

/*

 * Samsung Exynos DTS pinctrl constants

 *

 * Copyright (c) 2016 Samsung Electronics Co., Ltd.

 *		http://www.samsung.com

 * Copyright (c) 2022 Linaro Ltd

 * Author: Krzysztof Kozlowski <krzk@kernel.org>

 */



#ifndef __DTS_ARM64_SAMSUNG_EXYNOS_PINCTRL_H__

#define __DTS_ARM64_SAMSUNG_EXYNOS_PINCTRL_H__



#define EXYNOS_PIN_PULL_NONE		0

#define EXYNOS_PIN_PULL_DOWN		1

#define EXYNOS_PIN_PULL_UP		3



/* Pin function in power down mode */

#define EXYNOS_PIN_PDN_OUT0		0

#define EXYNOS_PIN_PDN_OUT1		1

#define EXYNOS_PIN_PDN_INPUT		2

#define EXYNOS_PIN_PDN_PREV		3



/*

 * Drive strengths for Exynos5410, Exynos542x, Exynos5800, Exynos7885, Exynos850

 * (except GPIO_HSI block), ExynosAutov9 (FSI0, PERIC1)

 */

#define EXYNOS5420_PIN_DRV_LV1		0

#define EXYNOS5420_PIN_DRV_LV2		1

#define EXYNOS5420_PIN_DRV_LV3		2

#define EXYNOS5420_PIN_DRV_LV4		3



/* Drive strengths for Exynos5433 */

#define EXYNOS5433_PIN_DRV_FAST_SR1	0

#define EXYNOS5433_PIN_DRV_FAST_SR2	1

#define EXYNOS5433_PIN_DRV_FAST_SR3	2

#define EXYNOS5433_PIN_DRV_FAST_SR4	3

#define EXYNOS5433_PIN_DRV_FAST_SR5	4

#define EXYNOS5433_PIN_DRV_FAST_SR6	5

#define EXYNOS5433_PIN_DRV_SLOW_SR1	8

#define EXYNOS5433_PIN_DRV_SLOW_SR2	9

#define EXYNOS5433_PIN_DRV_SLOW_SR3	0xa

#define EXYNOS5433_PIN_DRV_SLOW_SR4	0xb

#define EXYNOS5433_PIN_DRV_SLOW_SR5	0xc

#define EXYNOS5433_PIN_DRV_SLOW_SR6	0xf



/* Drive strengths for Exynos7 (except FSYS1) */

#define EXYNOS7_PIN_DRV_LV1		0

#define EXYNOS7_PIN_DRV_LV2		2

#define EXYNOS7_PIN_DRV_LV3		1

#define EXYNOS7_PIN_DRV_LV4		3



/* Drive strengths for Exynos7 FSYS1 block */

#define EXYNOS7_FSYS1_PIN_DRV_LV1	0

#define EXYNOS7_FSYS1_PIN_DRV_LV2	4

#define EXYNOS7_FSYS1_PIN_DRV_LV3	2

#define EXYNOS7_FSYS1_PIN_DRV_LV4	6

#define EXYNOS7_FSYS1_PIN_DRV_LV5	1

#define EXYNOS7_FSYS1_PIN_DRV_LV6	5



/* Drive strengths for Exynos850 GPIO_HSI block */

#define EXYNOS850_HSI_PIN_DRV_LV1	0	/* 1x   */

#define EXYNOS850_HSI_PIN_DRV_LV1_5	1	/* 1.5x */

#define EXYNOS850_HSI_PIN_DRV_LV2	2	/* 2x   */

#define EXYNOS850_HSI_PIN_DRV_LV2_5	3	/* 2.5x */

#define EXYNOS850_HSI_PIN_DRV_LV3	4	/* 3x   */

#define EXYNOS850_HSI_PIN_DRV_LV4	5	/* 4x   */



#define EXYNOS_PIN_FUNC_INPUT		0

#define EXYNOS_PIN_FUNC_OUTPUT		1

#define EXYNOS_PIN_FUNC_2		2

#define EXYNOS_PIN_FUNC_3		3

#define EXYNOS_PIN_FUNC_4		4

#define EXYNOS_PIN_FUNC_5		5

#define EXYNOS_PIN_FUNC_6		6

#define EXYNOS_PIN_FUNC_EINT		0xf

#define EXYNOS_PIN_FUNC_F		EXYNOS_PIN_FUNC_EINT



#endif /* __DTS_ARM64_SAMSUNG_EXYNOS_PINCTRL_H__ */

arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -9,7 +9,7 @@ 
 * tree nodes are listed in this file.

 */



#include <dt-bindings/pinctrl/samsung.h>

#include "exynos-pinctrl.h"



#define PIN(_pin, _func, _pull, _drv)					\

	pin- ## _pin {							\

arch/arm64/boot/dts/exynos/exynos5433.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -1820,7 +1820,7 @@ usbhost_dwc3: usb@15a00000 { 
			};

		};



		mshc_0: mshc@15540000 {

		mshc_0: mmc@15540000 {

			compatible = "samsung,exynos7-dw-mshc-smu";

			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;

			#address-cells = <1>;
@@ -1833,7 +1833,7 @@ mshc_0: mshc@15540000 { 
			status = "disabled";

		};



		mshc_1: mshc@15550000 {

		mshc_1: mmc@15550000 {

			compatible = "samsung,exynos7-dw-mshc-smu";

			interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;

			#address-cells = <1>;
@@ -1846,7 +1846,7 @@ mshc_1: mshc@15550000 { 
			status = "disabled";

		};



		mshc_2: mshc@15560000 {

		mshc_2: mmc@15560000 {

			compatible = "samsung,exynos7-dw-mshc-smu";

			interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;

			#address-cells = <1>;

arch/arm64/boot/dts/exynos/exynos7-espresso.dts

+3 −3
Original line number Diff line number Diff line
@@ -357,7 +357,7 @@ &pinctrl_alive { 
	pmic_irq: pmic-irq-pins {

		samsung,pins = "gpa0-2";

		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;

		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;

		samsung,pin-drv = <EXYNOS7_PIN_DRV_LV4>;

	};

};
@@ -397,14 +397,14 @@ usb30_vbus_en: usb30-vbus-en-pins { 
		samsung,pins = "gph1-1";

		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;

		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;

		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;

		samsung,pin-drv = <EXYNOS7_PIN_DRV_LV1>;

	};



	usb3drd_boost_en: usb3drd-boost-en-pins {

		samsung,pins = "gpf4-1";

		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;

		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;

		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;

		samsung,pin-drv = <EXYNOS7_PIN_DRV_LV1>;

	};

};