Commit 7e17cb4b authored by Charlene Liu's avatar Charlene Liu Committed by Alex Deucher
Browse files

drm/amd/display: Define dp_alt_mode



Also cleanup command_table2.c. No need for a lot of forward
declarations.

Signed-off-by: default avatarCharlene Liu <charlene.liu@amd.com>
Reviewed-by: default avatarKrunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0eebf8ca
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+17 −29
Original line number Diff line number Diff line
@@ -59,36 +59,7 @@
	bios_cmd_table_para_revision(bp->base.ctx->driver_context, \
			GET_INDEX_INTO_MASTER_TABLE(command, fname))

static void init_dig_encoder_control(struct bios_parser *bp);
static void init_transmitter_control(struct bios_parser *bp);
static void init_set_pixel_clock(struct bios_parser *bp);

static void init_set_crtc_timing(struct bios_parser *bp);

static void init_select_crtc_source(struct bios_parser *bp);
static void init_enable_crtc(struct bios_parser *bp);

static void init_external_encoder_control(struct bios_parser *bp);
static void init_enable_disp_power_gating(struct bios_parser *bp);
static void init_set_dce_clock(struct bios_parser *bp);
static void init_get_smu_clock_info(struct bios_parser *bp);

void dal_firmware_parser_init_cmd_tbl(struct bios_parser *bp)
{
	init_dig_encoder_control(bp);
	init_transmitter_control(bp);
	init_set_pixel_clock(bp);

	init_set_crtc_timing(bp);

	init_select_crtc_source(bp);
	init_enable_crtc(bp);

	init_external_encoder_control(bp);
	init_enable_disp_power_gating(bp);
	init_set_dce_clock(bp);
	init_get_smu_clock_info(bp);
}

static uint32_t bios_cmd_table_para_revision(void *dev,
					     uint32_t index)
@@ -829,3 +800,20 @@ static unsigned int get_smu_clock_info_v3_1(struct bios_parser *bp, uint8_t id)
	return 0;
}

void dal_firmware_parser_init_cmd_tbl(struct bios_parser *bp)
{
	init_dig_encoder_control(bp);
	init_transmitter_control(bp);
	init_set_pixel_clock(bp);

	init_set_crtc_timing(bp);

	init_select_crtc_source(bp);
	init_enable_crtc(bp);

	init_external_encoder_control(bp);
	init_enable_disp_power_gating(bp);
	init_set_dce_clock(bp);
	init_get_smu_clock_info(bp);

}
+2 −0
Original line number Diff line number Diff line
@@ -995,6 +995,8 @@ void dcn10_link_encoder_disable_output(

	if (!dcn10_is_dig_enabled(enc)) {
		/* OF_SKIP_POWER_DOWN_INACTIVE_ENCODER */
	/*in DP_Alt_No_Connect case, we turn off the dig already,
	after excuation the PHY w/a sequence, not allow touch PHY any more*/
		return;
	}
	/* Power-down RX and disable GPU PHY should be paired.
+5 −0
Original line number Diff line number Diff line
@@ -197,6 +197,11 @@ enum transmitter_color_depth {
	TRANSMITTER_COLOR_DEPTH_48       /* 16 bits */
};

enum dp_alt_mode {
	DP_Alt_mode__Unknown = 0,
	DP_Alt_mode__Connect,
	DP_Alt_mode__NoConnect,
};
/*
 *****************************************************************************
 * graphics_object_id struct