Commit 0eebf8ca authored by Wesley Chalmers's avatar Wesley Chalmers Committed by Alex Deucher
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drm/amd/display: Temporarily remove Chroma logs 



To ensure tests continue to pass

Signed-off-by: default avatarWesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: default avatarShahin Khayyer <Shahin.Khayyer@amd.com>
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent aa162e27

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

+2 −6
Original line number Diff line number Diff line
@@ -151,23 +151,19 @@ static void dcn10_log_hubp_states(struct dc *dc) 


	DTN_INFO("\n=========RQ========\n");

	DTN_INFO("HUBP:  drq_exp_m  prq_exp_m  mrq_exp_m  crq_exp_m  plane1_ba  L:chunk_s  min_chu_s  meta_ch_s"

		"  min_m_c_s  dpte_gr_s  mpte_gr_s  swath_hei  pte_row_h  C:chunk_s  min_chu_s  meta_ch_s"

		"  min_m_c_s  dpte_gr_s  mpte_gr_s  swath_hei  pte_row_h\n");

	for (i = 0; i < pool->pipe_count; i++) {

		struct dcn_hubp_state *s = &(TO_DCN10_HUBP(pool->hubps[i])->state);

		struct _vcs_dpi_display_rq_regs_st *rq_regs = &s->rq_regs;



		if (!s->blank_en)

			DTN_INFO("[%2d]:  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh\n",

			DTN_INFO("[%2d]:  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh\n",

				pool->hubps[i]->inst, rq_regs->drq_expansion_mode, rq_regs->prq_expansion_mode, rq_regs->mrq_expansion_mode,

				rq_regs->crq_expansion_mode, rq_regs->plane1_base_address, rq_regs->rq_regs_l.chunk_size,

				rq_regs->rq_regs_l.min_chunk_size, rq_regs->rq_regs_l.meta_chunk_size,

				rq_regs->rq_regs_l.min_meta_chunk_size, rq_regs->rq_regs_l.dpte_group_size,

				rq_regs->rq_regs_l.mpte_group_size, rq_regs->rq_regs_l.swath_height,

				rq_regs->rq_regs_l.pte_row_height_linear, rq_regs->rq_regs_c.chunk_size, rq_regs->rq_regs_c.min_chunk_size,

				rq_regs->rq_regs_c.meta_chunk_size, rq_regs->rq_regs_c.min_meta_chunk_size,

				rq_regs->rq_regs_c.dpte_group_size, rq_regs->rq_regs_c.mpte_group_size,

				rq_regs->rq_regs_c.swath_height, rq_regs->rq_regs_c.pte_row_height_linear);

				rq_regs->rq_regs_l.pte_row_height_linear);

	}



	DTN_INFO("========DLG========\n");