Commit 7c916f95 authored by Yifan Zhang's avatar Yifan Zhang Committed by Alex Deucher
Browse files

drm/amdgpu: change registers in error checking for smu 13.0.5 



smu 13.0.5 use new registers for smu msg and param.

Signed-off-by: default avatarYifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent bb7c3e9c

drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c

+8 −2
Original line number Diff line number Diff line
@@ -160,11 +160,17 @@ static void __smu_cmn_reg_print_error(struct smu_context *smu, 
{

	struct amdgpu_device *adev = smu->adev;

	const char *message = smu_get_message_name(smu, msg);

	u32 msg_idx, prm;



	switch (reg_c2pmsg_90) {

	case SMU_RESP_NONE: {

		u32 msg_idx = RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_66);

		u32 prm     = RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82);

	if (adev->ip_versions[MP1_HWIP][0] == IP_VERSION(13, 0, 5)) {

		msg_idx = RREG32_SOC15(MP1, 0, mmMP1_C2PMSG_2);

		prm     = RREG32_SOC15(MP1, 0, mmMP1_C2PMSG_34);

	} else {

		msg_idx = RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_66);

		prm     = RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82);

	}

		dev_err_ratelimited(adev->dev,

				    "SMU: I'm not done with your previous command: SMN_C2PMSG_66:0x%08X SMN_C2PMSG_82:0x%08X",

				    msg_idx, prm);