Unverified Commit 79619b79 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'v5.15-next-dts32' of...

Merge tag 'v5.15-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt

mt7623: add USB nodes
mt7629: update PCIe node to new format

* tag 'v5.15-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  dt-bindings: arm: Add MT6589 Fairphone 1
  ARM: dts: mediatek: Update MT7629 PCIe node for new format
  arm: dts: mt7623: add otg nodes for bpi-r2
  arm: dts: mt7623: add musb device nodes

Link: https://lore.kernel.org/r/7135d46f-5fb9-b46d-96d4-3b38548fe23e@gmail.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents d1edc986 1b17eee4
Loading
Loading
Loading
Loading
+1 −0
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ properties:
          - const: mediatek,mt6580
      - items:
          - enum:
              - fairphone,fp1
              - mundoreader,bq-aquaris5
          - const: mediatek,mt6589
      - items:
+33 −0
Original line number Diff line number Diff line
@@ -585,6 +585,39 @@ spi2: spi@11017000 {
		status = "disabled";
	};

	usb0: usb@11200000 {
		compatible = "mediatek,mt7623-musb",
			     "mediatek,mtk-musb";
		reg = <0 0x11200000 0 0x1000>;
		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
		interrupt-names = "mc";
		phys = <&u2port2 PHY_TYPE_USB2>;
		dr_mode = "otg";
		clocks = <&pericfg CLK_PERI_USB0>,
			 <&pericfg CLK_PERI_USB0_MCU>,
			 <&pericfg CLK_PERI_USB_SLV>;
		clock-names = "main","mcu","univpll";
		power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
		status = "disabled";
	};

	u2phy1: t-phy@11210000 {
		compatible = "mediatek,mt7623-tphy",
			     "mediatek,generic-tphy-v1";
		reg = <0 0x11210000 0 0x0800>;
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;
		status = "disabled";

		u2port2: usb-phy@11210800 {
			reg = <0 0x11210800 0 0x0100>;
			clocks = <&topckgen CLK_TOP_USB_PHY48M>;
			clock-names = "ref";
			#phy-cells = <1>;
		};
	};

	audsys: clock-controller@11220000 {
		compatible = "mediatek,mt7623-audsys",
			     "mediatek,mt2701-audsys",
+4 −0
Original line number Diff line number Diff line
@@ -35,6 +35,10 @@ &scpsys {
	clock-names = "ethif";
};

&usb0 {
	power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>;
};

&usb1 {
	power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>;
};
+25 −0
Original line number Diff line number Diff line
@@ -366,6 +366,14 @@ &pcie1_phy {
	status = "okay";
};

&pio {
	musb_pins: musb {
		pins-musb {
			pinmux = <MT7623_PIN_237_EXT_SDIO2_FUNC_DRV_VBUS>;
		};
	};
};

&pwm {
	pinctrl-names = "default";
	pinctrl-0 = <&pwm_pins_a>;
@@ -396,6 +404,19 @@ &uart2 {
	status = "okay";
};

&usb0 {
	pinctrl-names = "default";
	pinctrl-0 = <&musb_pins>;
	status = "okay";
	usb-role-switch;

	connector {
		compatible = "gpio-usb-b-connector", "usb-b-connector";
		type = "micro";
		id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>;
	};
};

&usb1 {
	vusb33-supply = <&reg_3p3v>;
	vbus-supply = <&reg_5v>;
@@ -408,6 +429,10 @@ &usb2 {
	status = "okay";
};

&u2phy1 {
	status = "okay";
};

&u3phy1 {
	status = "okay";
};
+2 −1
Original line number Diff line number Diff line
@@ -140,9 +140,10 @@ partition@b0000 {
	};
};

&pcie {
&pcie1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pcie_pins>;
	status = "okay";
};

&pciephy1 {
Loading