Unverified Commit d1edc986 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'tegra-for-5.16-arm64-dt' of...

Merge tag 'tegra-for-5.16-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Device tree changes for v5.16-rc1

This enables additional interrupts on the Tegra194 GPIO controller for
better load balancing and/or virtualization, adds audio support on
Jetson TX2 NX, enables the NVDEC video decoder on Tegra186 and later and
enables more audio processors that are found on Tegra210 and later.

Various cleanups across the board top things off.

* tag 'tegra-for-5.16-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Fix pcie-ep DT nodes
  arm64: tegra: Remove useless usb-ehci compatible string
  arm64: tegra: Extend APE audio support on Jetson platforms
  arm64: tegra: Add few AHUB devices for Tegra210 and later
  arm64: tegra: Remove unused backlight-boot-off property
  arm64: tegra: Add NVDEC to Tegra186/194 device trees
  arm64: tegra: Add new USB PHY properties on Tegra132
  arm64: tegra: Update HDA card name on Jetson TX2 NX
  arm64: tegra: Audio graph sound card for Jetson TX2 NX
  arm64: tegra: Add additional GPIO interrupt entries on Tegra194

Link: https://lore.kernel.org/r/20211008201132.1678814-7-thierry.reding@gmail.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents cda49040 b9e2404c
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+0 −2
Original line number Diff line number Diff line
@@ -1021,8 +1021,6 @@ backlight: backlight {

		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <6>;

		backlight-boot-off;
	};

	clk32k_in: clock@0 {
+9 −3
Original line number Diff line number Diff line
@@ -1107,7 +1107,7 @@ tegra_i2s4: i2s@70301400 {
	};

	usb@7d000000 {
		compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
		compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
		reg = <0x0 0x7d000000 0x0 0x4000>;
		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
		phy_type = "utmi";
@@ -1123,6 +1123,7 @@ phy1: usb-phy@7d000000 {
		compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
		reg = <0x0 0x7d000000 0x0 0x4000>,
		      <0x0 0x7d000000 0x0 0x4000>;
		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
		phy_type = "utmi";
		clocks = <&tegra_car TEGRA124_CLK_USBD>,
			 <&tegra_car TEGRA124_CLK_PLL_U>,
@@ -1142,11 +1143,12 @@ phy1: usb-phy@7d000000 {
		nvidia,hsdiscon-level = <5>;
		nvidia,xcvr-hsslew = <12>;
		nvidia,has-utmi-pad-registers;
		nvidia,pmc = <&tegra_pmc 0>;
		status = "disabled";
	};

	usb@7d004000 {
		compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
		compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
		reg = <0x0 0x7d004000 0x0 0x4000>;
		interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
		phy_type = "utmi";
@@ -1162,6 +1164,7 @@ phy2: usb-phy@7d004000 {
		compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
		reg = <0x0 0x7d004000 0x0 0x4000>,
		      <0x0 0x7d000000 0x0 0x4000>;
		interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
		phy_type = "utmi";
		clocks = <&tegra_car TEGRA124_CLK_USB2>,
			 <&tegra_car TEGRA124_CLK_PLL_U>,
@@ -1180,11 +1183,12 @@ phy2: usb-phy@7d004000 {
		nvidia,hssquelch-level = <2>;
		nvidia,hsdiscon-level = <5>;
		nvidia,xcvr-hsslew = <12>;
		nvidia,pmc = <&tegra_pmc 1>;
		status = "disabled";
	};

	usb@7d008000 {
		compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
		compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
		reg = <0x0 0x7d008000 0x0 0x4000>;
		interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
		phy_type = "utmi";
@@ -1200,6 +1204,7 @@ phy3: usb-phy@7d008000 {
		compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
		reg = <0x0 0x7d008000 0x0 0x4000>,
		      <0x0 0x7d000000 0x0 0x4000>;
		interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
		phy_type = "utmi";
		clocks = <&tegra_car TEGRA124_CLK_USB3>,
			 <&tegra_car TEGRA124_CLK_PLL_U>,
@@ -1218,6 +1223,7 @@ phy3: usb-phy@7d008000 {
		nvidia,hssquelch-level = <2>;
		nvidia,hsdiscon-level = <5>;
		nvidia,xcvr-hsslew = <12>;
		nvidia,pmc = <&tegra_pmc 2>;
		status = "disabled";
	};

+1399 −155

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+505 −1
Original line number Diff line number Diff line
@@ -124,7 +124,7 @@ mmc@3460000 {
	};

	hda@3510000 {
		nvidia,model = "jetson-tx2-hda";
		nvidia,model = "NVIDIA Jetson TX2 NX HDA";
		status = "okay";
	};

@@ -715,4 +715,508 @@ aux_alert0: critical {
			};
		};
	};

	aconnect@2900000 {
		status = "okay";

		dma-controller@2930000 {
			status = "okay";
		};

		interrupt-controller@2a40000 {
			status = "okay";
		};

		ahub@2900800 {
			status = "okay";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0x0>;

					xbar_admaif0_ep: endpoint {
						remote-endpoint = <&admaif0_ep>;
					};
				};

				port@1 {
					reg = <0x1>;

					xbar_admaif1_ep: endpoint {
						remote-endpoint = <&admaif1_ep>;
					};
				};

				port@2 {
					reg = <0x2>;

					xbar_admaif2_ep: endpoint {
						remote-endpoint = <&admaif2_ep>;
					};
				};

				port@3 {
					reg = <0x3>;

					xbar_admaif3_ep: endpoint {
						remote-endpoint = <&admaif3_ep>;
					};
				};

				port@4 {
					reg = <0x4>;

					xbar_admaif4_ep: endpoint {
						remote-endpoint = <&admaif4_ep>;
					};
				};

				port@5 {
					reg = <0x5>;

					xbar_admaif5_ep: endpoint {
						remote-endpoint = <&admaif5_ep>;
					};
				};

				port@6 {
					reg = <0x6>;

					xbar_admaif6_ep: endpoint {
						remote-endpoint = <&admaif6_ep>;
					};
				};

				port@7 {
					reg = <0x7>;

					xbar_admaif7_ep: endpoint {
						remote-endpoint = <&admaif7_ep>;
					};
				};

				port@8 {
					reg = <0x8>;

					xbar_admaif8_ep: endpoint {
						remote-endpoint = <&admaif8_ep>;
					};
				};

				port@9 {
					reg = <0x9>;

					xbar_admaif9_ep: endpoint {
						remote-endpoint = <&admaif9_ep>;
					};
				};

				port@a {
					reg = <0xa>;

					xbar_admaif10_ep: endpoint {
						remote-endpoint = <&admaif10_ep>;
					};
				};

				port@b {
					reg = <0xb>;

					xbar_admaif11_ep: endpoint {
						remote-endpoint = <&admaif11_ep>;
					};
				};

				port@c {
					reg = <0xc>;

					xbar_admaif12_ep: endpoint {
						remote-endpoint = <&admaif12_ep>;
					};
				};

				port@d {
					reg = <0xd>;

					xbar_admaif13_ep: endpoint {
						remote-endpoint = <&admaif13_ep>;
					};
				};

				port@e {
					reg = <0xe>;

					xbar_admaif14_ep: endpoint {
						remote-endpoint = <&admaif14_ep>;
					};
				};

				port@f {
					reg = <0xf>;

					xbar_admaif15_ep: endpoint {
						remote-endpoint = <&admaif15_ep>;
					};
				};

				port@10 {
					reg = <0x10>;

					xbar_admaif16_ep: endpoint {
						remote-endpoint = <&admaif16_ep>;
					};
				};

				port@11 {
					reg = <0x11>;

					xbar_admaif17_ep: endpoint {
						remote-endpoint = <&admaif17_ep>;
					};
				};

				port@12 {
					reg = <0x12>;

					xbar_admaif18_ep: endpoint {
						remote-endpoint = <&admaif18_ep>;
					};
				};

				port@13 {
					reg = <0x13>;

					xbar_admaif19_ep: endpoint {
						remote-endpoint = <&admaif19_ep>;
					};
				};

				xbar_i2s1_port: port@14 {
					reg = <0x14>;

					xbar_i2s1_ep: endpoint {
						remote-endpoint = <&i2s1_cif_ep>;
					};
				};

				xbar_i2s3_port: port@16 {
					reg = <0x16>;

					xbar_i2s3_ep: endpoint {
						remote-endpoint = <&i2s3_cif_ep>;
					};
				};

				xbar_dmic1_port: port@1a {
					reg = <0x1a>;

					xbar_dmic1_ep: endpoint {
						remote-endpoint = <&dmic1_cif_ep>;
					};
				};

				xbar_dmic2_port: port@1b {
					reg = <0x1b>;

					xbar_dmic2_ep: endpoint {
						remote-endpoint = <&dmic2_cif_ep>;
					};
				};
			};

			admaif@290f000 {
				status = "okay";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					admaif0_port: port@0 {
						reg = <0x0>;

						admaif0_ep: endpoint {
							remote-endpoint = <&xbar_admaif0_ep>;
						};
					};

					admaif1_port: port@1 {
						reg = <0x1>;

						admaif1_ep: endpoint {
							remote-endpoint = <&xbar_admaif1_ep>;
						};
					};

					admaif2_port: port@2 {
						reg = <0x2>;

						admaif2_ep: endpoint {
							remote-endpoint = <&xbar_admaif2_ep>;
						};
					};

					admaif3_port: port@3 {
						reg = <0x3>;

						admaif3_ep: endpoint {
							remote-endpoint = <&xbar_admaif3_ep>;
						};
					};

					admaif4_port: port@4 {
						reg = <0x4>;

						admaif4_ep: endpoint {
							remote-endpoint = <&xbar_admaif4_ep>;
						};
					};

					admaif5_port: port@5 {
						reg = <0x5>;

						admaif5_ep: endpoint {
							remote-endpoint = <&xbar_admaif5_ep>;
						};
					};

					admaif6_port: port@6 {
						reg = <0x6>;

						admaif6_ep: endpoint {
							remote-endpoint = <&xbar_admaif6_ep>;
						};
					};

					admaif7_port: port@7 {
						reg = <0x7>;

						admaif7_ep: endpoint {
							remote-endpoint = <&xbar_admaif7_ep>;
						};
					};

					admaif8_port: port@8 {
						reg = <0x8>;

						admaif8_ep: endpoint {
							remote-endpoint = <&xbar_admaif8_ep>;
						};
					};

					admaif9_port: port@9 {
						reg = <0x9>;

						admaif9_ep: endpoint {
							remote-endpoint = <&xbar_admaif9_ep>;
						};
					};

					admaif10_port: port@a {
						reg = <0xa>;

						admaif10_ep: endpoint {
							remote-endpoint = <&xbar_admaif10_ep>;
						};
					};

					admaif11_port: port@b {
						reg = <0xb>;

						admaif11_ep: endpoint {
							remote-endpoint = <&xbar_admaif11_ep>;
						};
					};

					admaif12_port: port@c {
						reg = <0xc>;

						admaif12_ep: endpoint {
							remote-endpoint = <&xbar_admaif12_ep>;
						};
					};

					admaif13_port: port@d {
						reg = <0xd>;

						admaif13_ep: endpoint {
							remote-endpoint = <&xbar_admaif13_ep>;
						};
					};

					admaif14_port: port@e {
						reg = <0xe>;

						admaif14_ep: endpoint {
							remote-endpoint = <&xbar_admaif14_ep>;
						};
					};

					admaif15_port: port@f {
						reg = <0xf>;

						admaif15_ep: endpoint {
							remote-endpoint = <&xbar_admaif15_ep>;
						};
					};

					admaif16_port: port@10 {
						reg = <0x10>;

						admaif16_ep: endpoint {
							remote-endpoint = <&xbar_admaif16_ep>;
						};
					};

					admaif17_port: port@11 {
						reg = <0x11>;

						admaif17_ep: endpoint {
							remote-endpoint = <&xbar_admaif17_ep>;
						};
					};

					admaif18_port: port@12 {
						reg = <0x12>;

						admaif18_ep: endpoint {
							remote-endpoint = <&xbar_admaif18_ep>;
						};
					};

					admaif19_port: port@13 {
						reg = <0x13>;

						admaif19_ep: endpoint {
							remote-endpoint = <&xbar_admaif19_ep>;
						};
					};
				};
			};

			i2s@2901000 {
				status = "okay";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						reg = <0>;

						i2s1_cif_ep: endpoint {
							remote-endpoint = <&xbar_i2s1_ep>;
						};
					};

					i2s1_port: port@1 {
						reg = <1>;

						i2s1_dap_ep: endpoint {
							dai-format = "i2s";
							/* Placeholder for external Codec */
						};
					};
				};
			};

			i2s@2901200 {
				status = "okay";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						reg = <0>;

						i2s3_cif_ep: endpoint {
							remote-endpoint = <&xbar_i2s3_ep>;
						};
					};

					i2s3_port: port@1 {
						reg = <1>;

						i2s3_dap_ep: endpoint {
							dai-format = "i2s";
							/* Placeholder for external Codec */
						};
					};
				};
			};

			dmic@2904000 {
				status = "okay";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						reg = <0>;

						dmic1_cif_ep: endpoint {
							remote-endpoint = <&xbar_dmic1_ep>;
						};
					};

					dmic1_port: port@1 {
						reg = <1>;

						dmic1_dap_ep: endpoint {
							/* Place holder for external Codec */
						};
					};
				};
			};

			dmic@2904100 {
				status = "okay";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						reg = <0>;

						dmic2_cif_ep: endpoint {
							remote-endpoint = <&xbar_dmic2_ep>;
						};
					};

					dmic2_port: port@1 {
						reg = <1>;

						dmic2_dap_ep: endpoint {
							/* Place holder for external Codec */
						};
					};
				};
			};
		};
	};

	sound {
		compatible = "nvidia,tegra186-audio-graph-card";
		status = "okay";

		dais = /* FE */
		       <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
		       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>,
		       <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>,
		       <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
		       <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>,
		       /* Router */
		       <&xbar_i2s1_port>, <&xbar_i2s3_port>,
		       <&xbar_dmic1_port>, <&xbar_dmic2_port>,
		       /* I/O */
		       <&i2s1_port>, <&i2s3_port>,
		       <&dmic1_port>, <&dmic2_port>;

		label = "NVIDIA Jetson TX2 NX APE";
	};
};
+136 −0
Original line number Diff line number Diff line
@@ -354,6 +354,126 @@ tegra_dspk2: dspk@2905100 {
				sound-name-prefix = "DSPK2";
				status = "disabled";
			};

			tegra_sfc1: sfc@2902000 {
				compatible = "nvidia,tegra186-sfc",
					     "nvidia,tegra210-sfc";
				reg = <0x2902000 0x200>;
				sound-name-prefix = "SFC1";
				status = "disabled";
			};

			tegra_sfc2: sfc@2902200 {
				compatible = "nvidia,tegra186-sfc",
					     "nvidia,tegra210-sfc";
				reg = <0x2902200 0x200>;
				sound-name-prefix = "SFC2";
				status = "disabled";
			};

			tegra_sfc3: sfc@2902400 {
				compatible = "nvidia,tegra186-sfc",
					     "nvidia,tegra210-sfc";
				reg = <0x2902400 0x200>;
				sound-name-prefix = "SFC3";
				status = "disabled";
			};

			tegra_sfc4: sfc@2902600 {
				compatible = "nvidia,tegra186-sfc",
					     "nvidia,tegra210-sfc";
				reg = <0x2902600 0x200>;
				sound-name-prefix = "SFC4";
				status = "disabled";
			};

			tegra_mvc1: mvc@290a000 {
				compatible = "nvidia,tegra186-mvc",
					     "nvidia,tegra210-mvc";
				reg = <0x290a000 0x200>;
				sound-name-prefix = "MVC1";
				status = "disabled";
			};

			tegra_mvc2: mvc@290a200 {
				compatible = "nvidia,tegra186-mvc",
					     "nvidia,tegra210-mvc";
				reg = <0x290a200 0x200>;
				sound-name-prefix = "MVC2";
				status = "disabled";
			};

			tegra_amx1: amx@2903000 {
				compatible = "nvidia,tegra186-amx",
					     "nvidia,tegra210-amx";
				reg = <0x2903000 0x100>;
				sound-name-prefix = "AMX1";
				status = "disabled";
			};

			tegra_amx2: amx@2903100 {
				compatible = "nvidia,tegra186-amx",
					     "nvidia,tegra210-amx";
				reg = <0x2903100 0x100>;
				sound-name-prefix = "AMX2";
				status = "disabled";
			};

			tegra_amx3: amx@2903200 {
				compatible = "nvidia,tegra186-amx",
					     "nvidia,tegra210-amx";
				reg = <0x2903200 0x100>;
				sound-name-prefix = "AMX3";
				status = "disabled";
			};

			tegra_amx4: amx@2903300 {
				compatible = "nvidia,tegra186-amx",
					     "nvidia,tegra210-amx";
				reg = <0x2903300 0x100>;
				sound-name-prefix = "AMX4";
				status = "disabled";
			};

			tegra_adx1: adx@2903800 {
				compatible = "nvidia,tegra186-adx",
					     "nvidia,tegra210-adx";
				reg = <0x2903800 0x100>;
				sound-name-prefix = "ADX1";
				status = "disabled";
			};

			tegra_adx2: adx@2903900 {
				compatible = "nvidia,tegra186-adx",
					     "nvidia,tegra210-adx";
				reg = <0x2903900 0x100>;
				sound-name-prefix = "ADX2";
				status = "disabled";
			};

			tegra_adx3: adx@2903a00 {
				compatible = "nvidia,tegra186-adx",
					     "nvidia,tegra210-adx";
				reg = <0x2903a00 0x100>;
				sound-name-prefix = "ADX3";
				status = "disabled";
			};

			tegra_adx4: adx@2903b00 {
				compatible = "nvidia,tegra186-adx",
					     "nvidia,tegra210-adx";
				reg = <0x2903b00 0x100>;
				sound-name-prefix = "ADX4";
				status = "disabled";
			};

			tegra_amixer: amixer@290bb00 {
				compatible = "nvidia,tegra186-amixer",
					     "nvidia,tegra210-amixer";
				reg = <0x290bb00 0x800>;
				sound-name-prefix = "MIXER1";
				status = "disabled";
			};
		};
	};

@@ -1433,6 +1553,22 @@ dsib: dsi@15400000 {
			power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>;
		};

		nvdec@15480000 {
			compatible = "nvidia,tegra186-nvdec";
			reg = <0x15480000 0x40000>;
			clocks = <&bpmp TEGRA186_CLK_NVDEC>;
			clock-names = "nvdec";
			resets = <&bpmp TEGRA186_RESET_NVDEC>;
			reset-names = "nvdec";

			power-domains = <&bpmp TEGRA186_POWER_DOMAIN_NVDEC>;
			interconnects = <&mc TEGRA186_MEMORY_CLIENT_NVDECSRD &emc>,
					<&mc TEGRA186_MEMORY_CLIENT_NVDECSRD1 &emc>,
					<&mc TEGRA186_MEMORY_CLIENT_NVDECSWR &emc>;
			interconnect-names = "dma-mem", "read-1", "write";
			iommus = <&smmu TEGRA186_SID_NVDEC>;
		};

		sor0: sor@15540000 {
			compatible = "nvidia,tegra186-sor";
			reg = <0x15540000 0x10000>;
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