Commit 6ec84a28 authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Mauro Carvalho Chehab
Browse files

[media] smiapp-pll: Create a structure for OP and VT limits 



OP and VT limits have identical fields, create a shared structure for
both.

Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarSakari Ailus <sakari.ailus@iki.fi>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent f5984bbd

drivers/media/i2c/smiapp-pll.c

+27 −27
Original line number Diff line number Diff line
@@ -122,7 +122,7 @@ static int __smiapp_pll_calculate(struct device *dev, 
		more_mul_max);

	/* Don't go above the division capability of op sys clock divider. */

	more_mul_max = min(more_mul_max,

			   limits->max_op_sys_clk_div * pll->pre_pll_clk_div

			   limits->op.max_sys_clk_div * pll->pre_pll_clk_div

			   / div);

	dev_dbg(dev, "more_mul_max: max_op_sys_clk_div check: %d\n",

		more_mul_max);
@@ -152,7 +152,7 @@ static int __smiapp_pll_calculate(struct device *dev, 


	more_mul_factor = lcm(div, pll->pre_pll_clk_div) / div;

	dev_dbg(dev, "more_mul_factor: %d\n", more_mul_factor);

	more_mul_factor = lcm(more_mul_factor, limits->min_op_sys_clk_div);

	more_mul_factor = lcm(more_mul_factor, limits->op.min_sys_clk_div);

	dev_dbg(dev, "more_mul_factor: min_op_sys_clk_div: %d\n",

		more_mul_factor);

	i = roundup(more_mul_min, more_mul_factor);
@@ -220,19 +220,19 @@ static int __smiapp_pll_calculate(struct device *dev, 
	dev_dbg(dev, "min_vt_div: %d\n", min_vt_div);

	min_vt_div = max(min_vt_div,

			 DIV_ROUND_UP(pll->pll_op_clk_freq_hz,

				      limits->max_vt_pix_clk_freq_hz));

				      limits->vt.max_pix_clk_freq_hz));

	dev_dbg(dev, "min_vt_div: max_vt_pix_clk_freq_hz: %d\n",

		min_vt_div);

	min_vt_div = max_t(uint32_t, min_vt_div,

			   limits->min_vt_pix_clk_div

			   * limits->min_vt_sys_clk_div);

			   limits->vt.min_pix_clk_div

			   * limits->vt.min_sys_clk_div);

	dev_dbg(dev, "min_vt_div: min_vt_clk_div: %d\n", min_vt_div);



	max_vt_div = limits->max_vt_sys_clk_div * limits->max_vt_pix_clk_div;

	max_vt_div = limits->vt.max_sys_clk_div * limits->vt.max_pix_clk_div;

	dev_dbg(dev, "max_vt_div: %d\n", max_vt_div);

	max_vt_div = min(max_vt_div,

			 DIV_ROUND_UP(pll->pll_op_clk_freq_hz,

				      limits->min_vt_pix_clk_freq_hz));

				      limits->vt.min_pix_clk_freq_hz));

	dev_dbg(dev, "max_vt_div: min_vt_pix_clk_freq_hz: %d\n",

		max_vt_div);
@@ -240,28 +240,28 @@ static int __smiapp_pll_calculate(struct device *dev, 
	 * Find limitsits for sys_clk_div. Not all values are possible

	 * with all values of pix_clk_div.

	 */

	min_sys_div = limits->min_vt_sys_clk_div;

	min_sys_div = limits->vt.min_sys_clk_div;

	dev_dbg(dev, "min_sys_div: %d\n", min_sys_div);

	min_sys_div = max(min_sys_div,

			  DIV_ROUND_UP(min_vt_div,

				       limits->max_vt_pix_clk_div));

				       limits->vt.max_pix_clk_div));

	dev_dbg(dev, "min_sys_div: max_vt_pix_clk_div: %d\n", min_sys_div);

	min_sys_div = max(min_sys_div,

			  pll->pll_op_clk_freq_hz

			  / limits->max_vt_sys_clk_freq_hz);

			  / limits->vt.max_sys_clk_freq_hz);

	dev_dbg(dev, "min_sys_div: max_pll_op_clk_freq_hz: %d\n", min_sys_div);

	min_sys_div = clk_div_even_up(min_sys_div);

	dev_dbg(dev, "min_sys_div: one or even: %d\n", min_sys_div);



	max_sys_div = limits->max_vt_sys_clk_div;

	max_sys_div = limits->vt.max_sys_clk_div;

	dev_dbg(dev, "max_sys_div: %d\n", max_sys_div);

	max_sys_div = min(max_sys_div,

			  DIV_ROUND_UP(max_vt_div,

				       limits->min_vt_pix_clk_div));

				       limits->vt.min_pix_clk_div));

	dev_dbg(dev, "max_sys_div: min_vt_pix_clk_div: %d\n", max_sys_div);

	max_sys_div = min(max_sys_div,

			  DIV_ROUND_UP(pll->pll_op_clk_freq_hz,

				       limits->min_vt_pix_clk_freq_hz));

				       limits->vt.min_pix_clk_freq_hz));

	dev_dbg(dev, "max_sys_div: min_vt_pix_clk_freq_hz: %d\n", max_sys_div);



	/*
@@ -276,13 +276,13 @@ static int __smiapp_pll_calculate(struct device *dev, 
		     sys_div += 2 - (sys_div & 1)) {

			uint16_t pix_div = DIV_ROUND_UP(vt_div, sys_div);



			if (pix_div < limits->min_vt_pix_clk_div

			    || pix_div > limits->max_vt_pix_clk_div) {

			if (pix_div < limits->vt.min_pix_clk_div

			    || pix_div > limits->vt.max_pix_clk_div) {

				dev_dbg(dev,

					"pix_div %d too small or too big (%d--%d)\n",

					pix_div,

					limits->min_vt_pix_clk_div,

					limits->max_vt_pix_clk_div);

					limits->vt.min_pix_clk_div,

					limits->vt.max_pix_clk_div);

				continue;

			}
@@ -327,36 +327,36 @@ static int __smiapp_pll_calculate(struct device *dev, 
	if (!rval)

		rval = bounds_check(

			dev, pll->op_sys_clk_div,

			limits->min_op_sys_clk_div, limits->max_op_sys_clk_div,

			limits->op.min_sys_clk_div, limits->op.max_sys_clk_div,

			"op_sys_clk_div");

	if (!rval)

		rval = bounds_check(

			dev, pll->op_pix_clk_div,

			limits->min_op_pix_clk_div, limits->max_op_pix_clk_div,

			limits->op.min_pix_clk_div, limits->op.max_pix_clk_div,

			"op_pix_clk_div");

	if (!rval)

		rval = bounds_check(

			dev, pll->op_sys_clk_freq_hz,

			limits->min_op_sys_clk_freq_hz,

			limits->max_op_sys_clk_freq_hz,

			limits->op.min_sys_clk_freq_hz,

			limits->op.max_sys_clk_freq_hz,

			"op_sys_clk_freq_hz");

	if (!rval)

		rval = bounds_check(

			dev, pll->op_pix_clk_freq_hz,

			limits->min_op_pix_clk_freq_hz,

			limits->max_op_pix_clk_freq_hz,

			limits->op.min_pix_clk_freq_hz,

			limits->op.max_pix_clk_freq_hz,

			"op_pix_clk_freq_hz");

	if (!rval)

		rval = bounds_check(

			dev, pll->vt_sys_clk_freq_hz,

			limits->min_vt_sys_clk_freq_hz,

			limits->max_vt_sys_clk_freq_hz,

			limits->vt.min_sys_clk_freq_hz,

			limits->vt.max_sys_clk_freq_hz,

			"vt_sys_clk_freq_hz");

	if (!rval)

		rval = bounds_check(

			dev, pll->vt_pix_clk_freq_hz,

			limits->min_vt_pix_clk_freq_hz,

			limits->max_vt_pix_clk_freq_hz,

			limits->vt.min_pix_clk_freq_hz,

			limits->vt.max_pix_clk_freq_hz,

			"vt_pix_clk_freq_hz");



	return rval;

drivers/media/i2c/smiapp-pll.h

+13 −17
Original line number Diff line number Diff line
@@ -73,6 +73,17 @@ struct smiapp_pll { 
	uint32_t pixel_rate_csi;

};



struct smiapp_pll_branch_limits {

	uint16_t min_sys_clk_div;

	uint16_t max_sys_clk_div;

	uint32_t min_sys_clk_freq_hz;

	uint32_t max_sys_clk_freq_hz;

	uint16_t min_pix_clk_div;

	uint16_t max_pix_clk_div;

	uint32_t min_pix_clk_freq_hz;

	uint32_t max_pix_clk_freq_hz;

};



struct smiapp_pll_limits {

	/* Strict PLL limits */

	uint32_t min_ext_clk_freq_hz;
@@ -86,23 +97,8 @@ struct smiapp_pll_limits { 
	uint32_t min_pll_op_freq_hz;

	uint32_t max_pll_op_freq_hz;



	uint16_t min_vt_sys_clk_div;

	uint16_t max_vt_sys_clk_div;

	uint32_t min_vt_sys_clk_freq_hz;

	uint32_t max_vt_sys_clk_freq_hz;

	uint16_t min_vt_pix_clk_div;

	uint16_t max_vt_pix_clk_div;

	uint32_t min_vt_pix_clk_freq_hz;

	uint32_t max_vt_pix_clk_freq_hz;



	uint16_t min_op_sys_clk_div;

	uint16_t max_op_sys_clk_div;

	uint32_t min_op_sys_clk_freq_hz;

	uint32_t max_op_sys_clk_freq_hz;

	uint16_t min_op_pix_clk_div;

	uint16_t max_op_pix_clk_div;

	uint32_t min_op_pix_clk_freq_hz;

	uint32_t max_op_pix_clk_freq_hz;

	struct smiapp_pll_branch_limits vt;

	struct smiapp_pll_branch_limits op;



	/* Other relevant limits */

	uint32_t min_line_length_pck_bin;

drivers/media/i2c/smiapp/smiapp-core.c

+18 −25
Original line number Diff line number Diff line
@@ -252,23 +252,23 @@ static int smiapp_pll_update(struct smiapp_sensor *sensor) 
		.min_pll_op_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_PLL_OP_FREQ_HZ],

		.max_pll_op_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_PLL_OP_FREQ_HZ],



		.min_op_sys_clk_div = sensor->limits[SMIAPP_LIMIT_MIN_OP_SYS_CLK_DIV],

		.max_op_sys_clk_div = sensor->limits[SMIAPP_LIMIT_MAX_OP_SYS_CLK_DIV],

		.min_op_pix_clk_div = sensor->limits[SMIAPP_LIMIT_MIN_OP_PIX_CLK_DIV],

		.max_op_pix_clk_div = sensor->limits[SMIAPP_LIMIT_MAX_OP_PIX_CLK_DIV],

		.min_op_sys_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_OP_SYS_CLK_FREQ_HZ],

		.max_op_sys_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_OP_SYS_CLK_FREQ_HZ],

		.min_op_pix_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_OP_PIX_CLK_FREQ_HZ],

		.max_op_pix_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_OP_PIX_CLK_FREQ_HZ],



		.min_vt_sys_clk_div = sensor->limits[SMIAPP_LIMIT_MIN_VT_SYS_CLK_DIV],

		.max_vt_sys_clk_div = sensor->limits[SMIAPP_LIMIT_MAX_VT_SYS_CLK_DIV],

		.min_vt_pix_clk_div = sensor->limits[SMIAPP_LIMIT_MIN_VT_PIX_CLK_DIV],

		.max_vt_pix_clk_div = sensor->limits[SMIAPP_LIMIT_MAX_VT_PIX_CLK_DIV],

		.min_vt_sys_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_VT_SYS_CLK_FREQ_HZ],

		.max_vt_sys_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_VT_SYS_CLK_FREQ_HZ],

		.min_vt_pix_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_VT_PIX_CLK_FREQ_HZ],

		.max_vt_pix_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_VT_PIX_CLK_FREQ_HZ],

		.op.min_sys_clk_div = sensor->limits[SMIAPP_LIMIT_MIN_OP_SYS_CLK_DIV],

		.op.max_sys_clk_div = sensor->limits[SMIAPP_LIMIT_MAX_OP_SYS_CLK_DIV],

		.op.min_pix_clk_div = sensor->limits[SMIAPP_LIMIT_MIN_OP_PIX_CLK_DIV],

		.op.max_pix_clk_div = sensor->limits[SMIAPP_LIMIT_MAX_OP_PIX_CLK_DIV],

		.op.min_sys_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_OP_SYS_CLK_FREQ_HZ],

		.op.max_sys_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_OP_SYS_CLK_FREQ_HZ],

		.op.min_pix_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_OP_PIX_CLK_FREQ_HZ],

		.op.max_pix_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_OP_PIX_CLK_FREQ_HZ],



		.vt.min_sys_clk_div = sensor->limits[SMIAPP_LIMIT_MIN_VT_SYS_CLK_DIV],

		.vt.max_sys_clk_div = sensor->limits[SMIAPP_LIMIT_MAX_VT_SYS_CLK_DIV],

		.vt.min_pix_clk_div = sensor->limits[SMIAPP_LIMIT_MIN_VT_PIX_CLK_DIV],

		.vt.max_pix_clk_div = sensor->limits[SMIAPP_LIMIT_MAX_VT_PIX_CLK_DIV],

		.vt.min_sys_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_VT_SYS_CLK_FREQ_HZ],

		.vt.max_sys_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_VT_SYS_CLK_FREQ_HZ],

		.vt.min_pix_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_VT_PIX_CLK_FREQ_HZ],

		.vt.max_pix_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_VT_PIX_CLK_FREQ_HZ],



		.min_line_length_pck_bin = sensor->limits[SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK_BIN],

		.min_line_length_pck = sensor->limits[SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK],
@@ -283,14 +283,7 @@ static int smiapp_pll_update(struct smiapp_sensor *sensor) 
		 * requirements regarding them are essentially the

		 * same as on VT ones.

		 */

		lim.min_op_sys_clk_div = lim.min_vt_sys_clk_div;

		lim.max_op_sys_clk_div = lim.max_vt_sys_clk_div;

		lim.min_op_pix_clk_div = lim.min_vt_pix_clk_div;

		lim.max_op_pix_clk_div = lim.max_vt_pix_clk_div;

		lim.min_op_sys_clk_freq_hz = lim.min_vt_sys_clk_freq_hz;

		lim.max_op_sys_clk_freq_hz = lim.max_vt_sys_clk_freq_hz;

		lim.min_op_pix_clk_freq_hz = lim.min_vt_pix_clk_freq_hz;

		lim.max_op_pix_clk_freq_hz = lim.max_vt_pix_clk_freq_hz;

		lim.op = lim.vt;

	}



	pll->binning_horizontal = sensor->binning_horizontal;