Commit 6b20edd7 authored by Christian Marangi's avatar Christian Marangi Committed by Bjorn Andersson
Browse files

ARM: dts: qcom: add missing clock configuration for kpss-acc-v1 



Add missing clock configuration by adding clocks, clock-names,
clock-output-names and #clock-cells bindings for each kpss-acc-v1
clock-controller to reflect Documentation schema.

Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarChristian Marangi <ansuelsmth@gmail.com>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230116204751.23045-7-ansuelsmth@gmail.com
parent a9e6d16a

arch/arm/boot/dts/qcom-apq8064.dtsi

+16 −0
Original line number Diff line number Diff line
@@ -388,21 +388,37 @@ timer@200a000 { 
		acc0: clock-controller@2088000 {

			compatible = "qcom,kpss-acc-v1";

			reg = <0x02088000 0x1000>, <0x02008000 0x1000>;

			clocks = <&gcc PLL8_VOTE>, <&pxo_board>;

			clock-names = "pll8_vote", "pxo";

			clock-output-names = "acpu0_aux";

			#clock-cells = <0>;

		};



		acc1: clock-controller@2098000 {

			compatible = "qcom,kpss-acc-v1";

			reg = <0x02098000 0x1000>, <0x02008000 0x1000>;

			clocks = <&gcc PLL8_VOTE>, <&pxo_board>;

			clock-names = "pll8_vote", "pxo";

			clock-output-names = "acpu1_aux";

			#clock-cells = <0>;

		};



		acc2: clock-controller@20a8000 {

			compatible = "qcom,kpss-acc-v1";

			reg = <0x020a8000 0x1000>, <0x02008000 0x1000>;

			clocks = <&gcc PLL8_VOTE>, <&pxo_board>;

			clock-names = "pll8_vote", "pxo";

			clock-output-names = "acpu2_aux";

			#clock-cells = <0>;

		};



		acc3: clock-controller@20b8000 {

			compatible = "qcom,kpss-acc-v1";

			reg = <0x020b8000 0x1000>, <0x02008000 0x1000>;

			clocks = <&gcc PLL8_VOTE>, <&pxo_board>;

			clock-names = "pll8_vote", "pxo";

			clock-output-names = "acpu3_aux";

			#clock-cells = <0>;

		};



		saw0: power-controller@2089000 {

arch/arm/boot/dts/qcom-ipq8064.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -579,6 +579,10 @@ l2cc: clock-controller@2011000 { 
		acc0: clock-controller@2088000 {

			compatible = "qcom,kpss-acc-v1";

			reg = <0x02088000 0x1000>, <0x02008000 0x1000>;

			clocks = <&gcc PLL8_VOTE>, <&pxo_board>;

			clock-names = "pll8_vote", "pxo";

			clock-output-names = "acpu0_aux";

			#clock-cells = <0>;

		};



		saw0: regulator@2089000 {
@@ -590,6 +594,10 @@ saw0: regulator@2089000 { 
		acc1: clock-controller@2098000 {

			compatible = "qcom,kpss-acc-v1";

			reg = <0x02098000 0x1000>, <0x02008000 0x1000>;

			clocks = <&gcc PLL8_VOTE>, <&pxo_board>;

			clock-names = "pll8_vote", "pxo";

			clock-output-names = "acpu1_aux";

			#clock-cells = <0>;

		};



		saw1: regulator@2099000 {

arch/arm/boot/dts/qcom-msm8960.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -207,11 +207,19 @@ regulators { 
		acc0: clock-controller@2088000 {

			compatible = "qcom,kpss-acc-v1";

			reg = <0x02088000 0x1000>, <0x02008000 0x1000>;

			clocks = <&gcc PLL8_VOTE>, <&pxo_board>;

			clock-names = "pll8_vote", "pxo";

			clock-output-names = "acpu0_aux";

			#clock-cells = <0>;

		};



		acc1: clock-controller@2098000 {

			compatible = "qcom,kpss-acc-v1";

			reg = <0x02098000 0x1000>, <0x02008000 0x1000>;

			clocks = <&gcc PLL8_VOTE>, <&pxo_board>;

			clock-names = "pll8_vote", "pxo";

			clock-output-names = "acpu1_aux";

			#clock-cells = <0>;

		};



		saw0: regulator@2089000 {