Commit 684dac40 authored by Alim Akhtar's avatar Alim Akhtar Committed by Krzysztof Kozlowski
Browse files

arm64: dts: fsd: Add initial pinctrl support 



Add initial pin configuration nodes for FSD SoC.

Cc: linux-fsd@tesla.com
Signed-off-by: default avatarShashank Prashar <s.prashar@samsung.com>
Signed-off-by: default avatarAswani Reddy <aswani.reddy@samsung.com>
Signed-off-by: default avatarAlim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220124141644.71052-16-alim.akhtar@samsung.com


Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
parent 18b1db6a

arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi

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+335 −0
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// SPDX-License-Identifier: GPL-2.0

/*

 * Tesla Full Self-Driving SoC device tree source

 *

 * Copyright (c) 2017-2021 Samsung Electronics Co., Ltd.

 *		https://www.samsung.com

 * Copyright (c) 2017-2021 Tesla, Inc.

 *		https://www.tesla.com

 */



#include <dt-bindings/pinctrl/samsung.h>



&pinctrl_fsys0 {

	gpf0: gpf0-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpf1: gpf1-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpf6: gpf6-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpf4: gpf4-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpf5: gpf5-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};

};



&pinctrl_peric {

	gpc8: gpc8-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpf2: gpf2-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpf3: gpf3-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpd0: gpd0-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpb0: gpb0-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpb1: gpb1-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpb4: gpb4-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpb5: gpb5-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpb6: gpb6-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpb7: gpb7-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpd1: gpd1-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpd2: gpd2-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpd3: gpd3-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpg0: gpg0-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpg1: gpg1-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpg2: gpg2-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpg3: gpg3-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpg4: gpg4-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpg5: gpg5-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpg6: gpg6-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	gpg7: gpg7-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};



	pwm0_out: pwm0-out-pins {

		samsung,pins = "gpb6-1";

		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;

		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;

		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>;

	};



	pwm1_out: pwm1-out-pins {

		samsung,pins = "gpb6-5";

		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;

		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;

		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>;

	};



	hs_i2c0_bus: hs-i2c0-bus-pins {

		samsung,pins = "gpb0-0", "gpb0-1";

		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;

		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;

		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;

	};



	hs_i2c1_bus: hs-i2c1-bus-pins {

		samsung,pins = "gpb0-2", "gpb0-3";

		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;

		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;

		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;

	};



	hs_i2c2_bus: hs-i2c2-bus-pins {

		samsung,pins = "gpb0-4", "gpb0-5";

		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;

		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;

		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;

	};



	hs_i2c3_bus: hs-i2c3-bus-pins {

		samsung,pins = "gpb0-6", "gpb0-7";

		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;

		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;

		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;

	};



	hs_i2c4_bus: hs-i2c4-bus-pins {

		samsung,pins = "gpb1-0", "gpb1-1";

		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;

		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;

		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;

	};



	hs_i2c5_bus: hs-i2c5-bus-pins {

		samsung,pins = "gpb1-2", "gpb1-3";

		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;

		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;

		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;

	};



	hs_i2c6_bus: hs-i2c6-bus-pins {

		samsung,pins = "gpb1-4", "gpb1-5";

		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;

		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;

		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;

	};



	hs_i2c7_bus: hs-i2c7-bus-pins {

		samsung,pins = "gpb1-6", "gpb1-7";

		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;

		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;

		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;

	};



	uart0_data: uart0-data-pins {

		samsung,pins = "gpb7-0", "gpb7-1";

		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;

		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;

		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;

	};



	uart1_data: uart1-data-pins {

		samsung,pins = "gpb7-4", "gpb7-5";

		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;

		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;

		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;

	};



	spi0_bus: spi0-bus-pins {

		samsung,pins = "gpb4-0", "gpb4-2", "gpb4-3";

		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;

		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;

		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;

	};



	spi1_bus: spi1-bus-pins {

		samsung,pins = "gpb4-4", "gpb4-6", "gpb4-7";

		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;

		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;

		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;

	};



	spi2_bus: spi2-bus-pins {

		samsung,pins = "gpb5-0", "gpb5-2", "gpb5-3";

		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;

		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;

		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;

	};

};



&pinctrl_pmu {

	gpq0: gpq0-gpio-bank {

		gpio-controller;

		#gpio-cells = <2>;

	};

};

arch/arm64/boot/dts/tesla/fsd.dtsi

+22 −0
Original line number Diff line number Diff line
@@ -26,6 +26,9 @@ aliases { 
		i2c5 = &hsi2c_5;

		i2c6 = &hsi2c_6;

		i2c7 = &hsi2c_7;

		pinctrl0 = &pinctrl_fsys0;

		pinctrl1 = &pinctrl_peric;

		pinctrl2 = &pinctrl_pmu;

	};



	cpus {
@@ -648,5 +651,24 @@ hsi2c_7: i2c@14270000 { 
			clock-names = "hsi2c";

			status = "disabled";

		};



		pinctrl_pmu: pinctrl@114f0000 {

			compatible = "tesla,fsd-pinctrl";

			reg = <0x0 0x114f0000 0x0 0x1000>;

		};



		pinctrl_peric: pinctrl@141f0000 {

			compatible = "tesla,fsd-pinctrl";

			reg = <0x0 0x141f0000 0x0 0x1000>;

			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;

		};



		pinctrl_fsys0: pinctrl@15020000 {

			compatible = "tesla,fsd-pinctrl";

			reg = <0x0 0x15020000 0x0 0x1000>;

			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;

		};

	};

};



#include "fsd-pinctrl.dtsi"