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Commit 67f80edf authored by Biju Das's avatar Biju Das Committed by Geert Uytterhoeven
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clk: renesas: r9a07g044: Add DSI clock and reset entries 



Add DSI clock and reset entries to CPG driver.

Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220430114156.6260-10-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 6f6178f1
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