Commit 647f5a00 authored by Christophe Leroy's avatar Christophe Leroy Committed by Greg Kroah-Hartman
Browse files

serial: cpm_uart: Deduplicate cpm_set_{brg/smc_fcr/scc_fcr}() 



CPMFCR_EB is the same as SMC_EB and is defined
for both CPM1 and CPM2.

CPMFCR_GBL is defined as 0 for CPM1.

Therefore the CPM2 version of cpm_set_scc_fcr() and
cpm_set_smc_fcr() can be used on both CPM1 and CPM2.

And cpm_set_brg() is already identical and just a
wrapper of cpm_setbrg().

In addition those three fonctions are only called once
from cpm_uart_core.c, so just replace the calls with
the content of the CPM2 versions of them.

And DPRAM_BASE is identical so can go in cpm_uart.h. While
moving it, use cpm_muram_addr() directly instead of the
cpm_dpram_addr() macro and remove __force tag which isn't needed.

Then cpm_uart_cpm1.h and cpm_uart_cpm2.h go away.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Link: https://lore.kernel.org/r/6920e61fd362961ae1aeda897c8bfe1efacdc9dc.1691068700.git.christophe.leroy@csgroup.eu


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent c2d6c1b4

drivers/tty/serial/cpm_uart/cpm_uart.h

+4 −2
Original line number Diff line number Diff line
@@ -15,11 +15,13 @@ 
struct gpio_desc;



#if defined(CONFIG_CPM2)

#include "cpm_uart_cpm2.h"

#include "asm/cpm2.h"

#elif defined(CONFIG_CPM1)

#include "cpm_uart_cpm1.h"

#include "asm/cpm1.h"

#endif



#define DPRAM_BASE	((u8 __iomem *)cpm_muram_addr(0))



#define SERIAL_CPM_MAJOR	204

#define SERIAL_CPM_MINOR	46

drivers/tty/serial/cpm_uart/cpm_uart_core.c

+5 −3
Original line number Diff line number Diff line
@@ -603,7 +603,7 @@ static void cpm_uart_set_termios(struct uart_port *port, 
	if (pinfo->clk)

		clk_set_rate(pinfo->clk, baud);

	else

		cpm_set_brg(pinfo->brg - 1, baud);

		cpm_setbrg(pinfo->brg - 1, baud);

	spin_unlock_irqrestore(&port->lock, flags);

}
@@ -769,7 +769,8 @@ static void cpm_uart_init_scc(struct uart_cpm_port *pinfo) 
	 * parameter ram.

	 */



	cpm_set_scc_fcr(sup);

	out_8(&sup->scc_genscc.scc_rfcr, CPMFCR_GBL | CPMFCR_EB);

	out_8(&sup->scc_genscc.scc_tfcr, CPMFCR_GBL | CPMFCR_EB);



	out_be16(&sup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);

	out_be16(&sup->scc_maxidl, 0x10);
@@ -840,7 +841,8 @@ static void cpm_uart_init_smc(struct uart_cpm_port *pinfo) 
	/* Set up the uart parameters in the

	 * parameter ram.

	 */

	cpm_set_smc_fcr(up);

	out_8(&up->smc_rfcr, CPMFCR_GBL | CPMFCR_EB);

	out_8(&up->smc_tfcr, CPMFCR_GBL | CPMFCR_EB);



	/* Using idle character time requires some additional tuning.  */

	out_be16(&up->smc_mrblr, pinfo->rx_fifosize);

drivers/tty/serial/cpm_uart/cpm_uart_cpm1.h

deleted100644 → 0
+0 −33
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

/*

 * Driver for CPM (SCC/SMC) serial ports

 *

 * definitions for cpm1

 *

 */



#ifndef CPM_UART_CPM1_H

#define CPM_UART_CPM1_H



#include <asm/cpm1.h>



static inline void cpm_set_brg(int brg, int baud)

{

	cpm_setbrg(brg, baud);

}



static inline void cpm_set_scc_fcr(scc_uart_t __iomem * sup)

{

	out_8(&sup->scc_genscc.scc_rfcr, SMC_EB);

	out_8(&sup->scc_genscc.scc_tfcr, SMC_EB);

}



static inline void cpm_set_smc_fcr(smc_uart_t __iomem * up)

{

	out_8(&up->smc_rfcr, SMC_EB);

	out_8(&up->smc_tfcr, SMC_EB);

}



#define DPRAM_BASE	((u8 __iomem __force *)cpm_dpram_addr(0))



#endif

drivers/tty/serial/cpm_uart/cpm_uart_cpm2.h

deleted100644 → 0
+0 −33
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

/*

 * Driver for CPM (SCC/SMC) serial ports

 *

 * definitions for cpm2

 *

 */



#ifndef CPM_UART_CPM2_H

#define CPM_UART_CPM2_H



#include <asm/cpm2.h>



static inline void cpm_set_brg(int brg, int baud)

{

	cpm_setbrg(brg, baud);

}



static inline void cpm_set_scc_fcr(scc_uart_t __iomem *sup)

{

	out_8(&sup->scc_genscc.scc_rfcr, CPMFCR_GBL | CPMFCR_EB);

	out_8(&sup->scc_genscc.scc_tfcr, CPMFCR_GBL | CPMFCR_EB);

}



static inline void cpm_set_smc_fcr(smc_uart_t __iomem *up)

{

	out_8(&up->smc_rfcr, CPMFCR_GBL | CPMFCR_EB);

	out_8(&up->smc_tfcr, CPMFCR_GBL | CPMFCR_EB);

}



#define DPRAM_BASE	((u8 __iomem __force *)cpm_dpram_addr(0))



#endif