Commit 618b902d authored by Yoshinori Sato's avatar Yoshinori Sato
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h8300: clocksource 



h8300_timer8: 8bit clockevent device
h8300_timer16 / h8300_tpu: 16bit clocksource

Signed-off-by: default avatarYoshinori Sato <ysato@users.sourceforge.jp>
parent 7b5bb891

Documentation/devicetree/bindings/timer/renesas,16bit-timer.txt

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* Renesas H8/300 16bit timer



The 16bit timer is a 16bit timer/counter with configurable clock inputs and

programmable compare match.



Required Properties:



  - compatible: must contain "renesas,16bit-timer"

  - reg: base address and length of the registers block for the timer module.

  - interrupts: interrupt-specifier for the timer, IMIA

  - clocks: a list of phandle, one for each entry in clock-names.

  - clock-names: must contain "peripheral_clk" for the functional clock.

  - renesas,channel: timer channel number.



Example:



	timer16: timer@ffff68 {

		compatible = "reneas,16bit-timer";

		reg = <0xffff68 8>, <0xffff60 8>;

		interrupts = <24>;

		renesas,channel = <0>;

		clocks = <&pclk>;

		clock-names = "peripheral_clk";

	};

Documentation/devicetree/bindings/timer/renesas,8bit-timer.txt

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* Renesas H8/300 8bit timer



The 8bit timer is a 8bit timer/counter with configurable clock inputs and

programmable compare match.



This implement only supported cascade mode.



Required Properties:



  - compatible: must contain "renesas,8bit-timer"

  - reg: base address and length of the registers block for the timer module.

  - interrupts: interrupt-specifier for the timer, CMIA and TOVI

  - clocks: a list of phandle, one for each entry in clock-names.

  - clock-names: must contain "fck" for the functional clock.



Example:



	timer8_0: timer@ffff80 {

		compatible = "renesas,8bit-timer";

		reg = <0xffff80 10>;

		interrupts = <36>;

		clocks = <&fclk>;

		clock-names = "fck";

	};

Documentation/devicetree/bindings/timer/renesas,tpu.txt

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* Renesas H8/300 Timer Pluse Unit



The TPU is a 16bit timer/counter with configurable clock inputs and

programmable compare match.

This implementation support only cascade mode.



Required Properties:



  - compatible: must contain "renesas,tpu"

  - reg: base address and length of the registers block in 2 channel.

  - clocks: a list of phandle, one for each entry in clock-names.

  - clock-names: must contain "peripheral_clk" for the functional clock.





Example:

	tpu: tpu@ffffe0 {

		compatible = "renesas,tpu";

		reg = <0xffffe0 16>, <0xfffff0 12>;

		clocks = <&pclk>;

		clock-names = "peripheral_clk";

	};

drivers/clocksource/Kconfig

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@@ -258,4 +258,11 @@ config CLKSRC_PXA 
	help

	  This enables OST0 support available on PXA and SA-11x0

	  platforms.



config H8300_TMR16

        bool



config H8300_TPU

        bool



endmenu

drivers/clocksource/Makefile

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@@ -52,3 +52,6 @@ obj-$(CONFIG_ARCH_INTEGRATOR_AP) += timer-integrator-ap.o 
obj-$(CONFIG_CLKSRC_VERSATILE)		+= versatile.o

obj-$(CONFIG_CLKSRC_MIPS_GIC)		+= mips-gic-timer.o

obj-$(CONFIG_ASM9260_TIMER)		+= asm9260_timer.o

obj-$(CONFIG_H8300)			+= h8300_timer8.o

obj-$(CONFIG_H8300_TMR16)		+= h8300_timer16.o

obj-$(CONFIG_H8300_TPU)			+= h8300_tpu.o