Commit 5cfd9784 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
Browse files

drm/amdgpu: expose peak profiling mode shader/memory clocks



Expose those informations to UMD who need them as for standard
profiling mode.

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b1a9557a
Loading
Loading
Loading
Loading
+18 −0
Original line number Diff line number Diff line
@@ -1014,6 +1014,24 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
			}
			ui32 /= 100;
			break;
		case AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_SCLK:
			/* get peak pstate sclk in Mhz */
			if (amdgpu_dpm_read_sensor(adev,
						   AMDGPU_PP_SENSOR_PEAK_PSTATE_SCLK,
						   (void *)&ui32, &ui32_size)) {
				return -EINVAL;
			}
			ui32 /= 100;
			break;
		case AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_MCLK:
			/* get peak pstate mclk in Mhz */
			if (amdgpu_dpm_read_sensor(adev,
						   AMDGPU_PP_SENSOR_PEAK_PSTATE_MCLK,
						   (void *)&ui32, &ui32_size)) {
				return -EINVAL;
			}
			ui32 /= 100;
			break;
		default:
			DRM_DEBUG_KMS("Invalid request %d\n",
				      info->sensor_info.type);
+4 −0
Original line number Diff line number Diff line
@@ -832,6 +832,10 @@ struct drm_amdgpu_cs_chunk_data {
	#define AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_SCLK		0x8
	/* Subquery id: Query GPU stable pstate memory clock */
	#define AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_MCLK		0x9
	/* Subquery id: Query GPU peak pstate shader clock */
	#define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_SCLK			0xa
	/* Subquery id: Query GPU peak pstate memory clock */
	#define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_MCLK			0xb
/* Number of VRAM page faults on CPU access. */
#define AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS	0x1E
#define AMDGPU_INFO_VRAM_LOST_COUNTER		0x1F