Commit 59f5ae05 authored by Jonas Kuenstler's avatar Jonas Kuenstler Committed by Shawn Guo
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arm64: dts: imx8mp-phycore-som: Set usdhc root clock for eMMC 



Set the usdhc root clock to 400MHz to be able to support
HS400/HS400ES modes for eMMC on phyCORE-i.MX8MP SoM.

Signed-off-by: default avatarJonas Kuenstler <j.kuenstler@phytec.de>
Signed-off-by: default avatarTeresa Remmet <t.remmet@phytec.de>
Reviewed-by: default avatarHaibo Chen <haibo.chen@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent b00e3e03

arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -197,6 +197,8 @@ rv3028: rtc@52 { 


/* eMMC */

&usdhc3 {

	assigned-clocks = <&clk IMX8MP_CLK_USDHC3_ROOT>;

	assigned-clock-rates = <400000000>;

	pinctrl-names = "default", "state_100mhz", "state_200mhz";

	pinctrl-0 = <&pinctrl_usdhc3>;

	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;