Commit 594957d7 authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

x86/cpu: Remove pointless evaluation of x86_coreid_bits 



cpuinfo_x86::x86_coreid_bits is only used by the AMD numa topology code. No
point in evaluating it on non AMD systems.

No functional change.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Tested-by: default avatarJuergen Gross <jgross@suse.com>
Tested-by: default avatarSohil Mehta <sohil.mehta@intel.com>
Tested-by: default avatarMichael Kelley <mikelley@microsoft.com>
Tested-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: default avatarZhang Rui <rui.zhang@intel.com>
Reviewed-by: default avatarArjan van de Ven <arjan@linux.intel.com>
Acked-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20230814085112.687588373@linutronix.de
parent e3c0c5d5

arch/x86/kernel/cpu/intel.c

+0 −13
Original line number Diff line number Diff line
@@ -314,19 +314,6 @@ static void early_init_intel(struct cpuinfo_x86 *c) 
		setup_clear_cpu_cap(X86_FEATURE_PGE);

	}



	if (c->cpuid_level >= 0x00000001) {

		u32 eax, ebx, ecx, edx;



		cpuid(0x00000001, &eax, &ebx, &ecx, &edx);

		/*

		 * If HTT (EDX[28]) is set EBX[16:23] contain the number of

		 * apicids which are reserved per package. Store the resulting

		 * shift value for the package management code.

		 */

		if (edx & (1U << 28))

			c->x86_coreid_bits = get_count_order((ebx >> 16) & 0xff);

	}



	check_memory_type_self_snoop_errata(c);



	/*

arch/x86/kernel/cpu/zhaoxin.c

+0 −14
Original line number Diff line number Diff line
@@ -65,20 +65,6 @@ static void early_init_zhaoxin(struct cpuinfo_x86 *c) 
		set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);

		set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);

	}



	if (c->cpuid_level >= 0x00000001) {

		u32 eax, ebx, ecx, edx;



		cpuid(0x00000001, &eax, &ebx, &ecx, &edx);

		/*

		 * If HTT (EDX[28]) is set EBX[16:23] contain the number of

		 * apicids which are reserved per package. Store the resulting

		 * shift value for the package management code.

		 */

		if (edx & (1U << 28))

			c->x86_coreid_bits = get_count_order((ebx >> 16) & 0xff);

	}



}



static void init_zhaoxin(struct cpuinfo_x86 *c)