Commit 5434fd92 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
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Revert "drm/i915: Include display_mmio_offset in sequencer index/data registers" 



We use port I/O for VGA register access, so adding display_mmio_offset
is just wrong.

This reverts commit 56a12a50.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 91738a95

drivers/gpu/drm/i915/i915_reg.h

+2 −8
Original line number Diff line number Diff line
@@ -147,15 +147,9 @@ 
#define   VGA_MSR_MEM_EN (1<<1)

#define   VGA_MSR_CGA_MODE (1<<0)



/*

 * SR01 is the only VGA register touched on non-UMS setups.

 * VLV doesn't do UMS, so the sequencer index/data registers

 * are the only VGA registers which need to include

 * display_mmio_offset.

 */

#define VGA_SR_INDEX (dev_priv->info->display_mmio_offset + 0x3c4)

#define VGA_SR_INDEX 0x3c4

#define SR01			1

#define VGA_SR_DATA (dev_priv->info->display_mmio_offset + 0x3c5)

#define VGA_SR_DATA 0x3c5



#define VGA_AR_INDEX 0x3c0

#define   VGA_AR_VID_EN (1<<5)