Unverified Commit 52e71a47 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-dt64-5.18' of...

Merge tag 'imx-dt64-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX arm64 device tree change for 5.18:

- New support for a number of i.MX8M Mini based boards: Protonic PRT8MM,
  emCON-MX8M Mini, Toradex Verdin, Gateworks GW7903.
- A series from Adam Ford to enable GPC, USB and display support for
  i.MX8M Nano.
- Enable G1 and G2 video decoder devices for i.MX8MM and i.MX8MQ.
- Enable PCIe support on imx8mm-beacon, tqma8mqml, imx8mm-evk,
  imx8mq-evk and imx8mm-venice board.
- A series from Hugo Villeneuve to add PCA6416 interrupt controller
  configuration, GPIO line names and i2C5 support for imx8mp-evk board.
- Correct I2C3 pad-ctrl and add internal display support for mnt-reform2
  board.
- Improve fsl-ls1028a-qds overlay support by dropping syntax hard coding
  and using overlay target for build.
- Add overlay support for serial modes and imx219 rpi v2 camera on
  Gateworks imx8mm-venice devices.
- A set of patches from Teresa Remmet to update phyCORE-i.MX8MP SoM
  device tree, including drive strength updates of different interfaces
  and PMIC configuration changes.
- Device additions on various boards and some small random changes.

* tag 'imx-dt64-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (50 commits)
  arm64: dts: imx8mp-phycore-som: Set usdhc root clock for eMMC
  arm64: dts: imx8mp-phycore-som: LDO5 needs to be enabled instead of LDO4
  arm64: dts: imx8mp-phycore-som: Set VDD_ARM run and standby voltage
  arm64: dts: imx8mp-phycore-som: Update WDOG muxing
  arm64: dts: imx8mp-phycore-som: Reduce drive strength for fec tx lines
  arm64: dts: imx8mp-phycore-som: Adapt eMMC drive strength
  arm64: dts: imx8mp-phycore-som: Set minimum output impedance for eth phy
  arm64: dts: imx8mm-venice-gw72xx-0x: add dt overlay for imx219 rpi v2 camera
  arm64: dts: imx8mm-venice-gw73xx-0x: add dt overlay for imx219 rpi v2 camera
  arm64: dts: imx8mm-venice-gw72xx-0x: add dt overlays for serial modes
  arm64: dts: imx8mm-venice-gw73xx-0x: add dt overlays for serial modes
  arm64: dts: imx: Add i.mx8mm Gateworks gw7903 dts support
  arm64: dts: ls1028a: add efuse node
  arm64: dts: imx8mp-evk: add support for I2C5
  arm64: dts: imx8mp-evk: add PCA6416 gpio line names
  arm64: dts: imx8qm: added more serial alias to dts
  arm64: dts: imx8qm: add compatible string for usdhc3
  arm64: dts: imx8mq-evk: Add second PCIe port support
  arm64: dts: imx8mm-beacon: Enable PCIe
  arm64: dts: freescale: add initial support for verdin imx8m mini
  ...

Link: https://lore.kernel.org/r/20220222075226.160187-5-shawnguo@kernel.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 9d71d4a9 59f5ae05
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+39 −16
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0

# required for overlay support
DTC_FLAGS_fsl-ls1028a-qds := -@
DTC_FLAGS_fsl-ls1028a-qds-13bb := -@
DTC_FLAGS_fsl-ls1028a-qds-65bb := -@
DTC_FLAGS_fsl-ls1028a-qds-7777 := -@
DTC_FLAGS_fsl-ls1028a-qds-85bb := -@
DTC_FLAGS_fsl-ls1028a-qds-899b := -@
DTC_FLAGS_fsl-ls1028a-qds-9999 := -@

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frwy.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-oxalis.dtb
@@ -21,12 +12,6 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var2.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var3-ads2.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var4.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-13bb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-65bb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-7777.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-85bb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-899b.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-9999.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
@@ -49,9 +34,24 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb

fsl-ls1028a-qds-13bb-dtbs := fsl-ls1028a-qds.dtb fsl-ls1028a-qds-13bb.dtbo
fsl-ls1028a-qds-65bb-dtbs := fsl-ls1028a-qds.dtb fsl-ls1028a-qds-65bb.dtbo
fsl-ls1028a-qds-7777-dtbs := fsl-ls1028a-qds.dtb fsl-ls1028a-qds-7777.dtbo
fsl-ls1028a-qds-85bb-dtbs := fsl-ls1028a-qds.dtb fsl-ls1028a-qds-85bb.dtbo
fsl-ls1028a-qds-899b-dtbs := fsl-ls1028a-qds.dtb fsl-ls1028a-qds-899b.dtbo
fsl-ls1028a-qds-9999-dtbs := fsl-ls1028a-qds.dtb fsl-ls1028a-qds-9999.dtbo

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-13bb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-65bb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-7777.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-85bb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-899b.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-9999.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-emcon-avari.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-ctouch2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-edimm2.2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-n801x-s.dtb
@@ -63,6 +63,11 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw72xx-0x.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7901.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7902.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7903.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-dahlia.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-dev.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-wifi-dahlia.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-wifi-dev.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-beacon-kit.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-bsh-smm-s2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-bsh-smm-s2pro.dtb
@@ -94,6 +99,24 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb

imx8mm-venice-gw72xx-0x-imx219-dtbs	:= imx8mm-venice-gw73xx-0x.dtb imx8mm-venice-gw73xx-0x-imx219.dtbo
imx8mm-venice-gw72xx-0x-rs232-rts-dtbs	:= imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rs232-rts.dtbo
imx8mm-venice-gw72xx-0x-rs422-dtbs	:= imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rs422.dtbo
imx8mm-venice-gw72xx-0x-rs485-dtbs	:= imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rs485.dtbo
imx8mm-venice-gw73xx-0x-imx219-dtbs	:= imx8mm-venice-gw73xx-0x.dtb imx8mm-venice-gw73xx-0x-imx219.dtbo
imx8mm-venice-gw73xx-0x-rs232-rts-dtbs	:= imx8mm-venice-gw73xx-0x.dtb imx8mm-venice-gw73xx-0x-rs232-rts.dtbo
imx8mm-venice-gw73xx-0x-rs422-dtbs	:= imx8mm-venice-gw73xx-0x.dtb imx8mm-venice-gw73xx-0x-rs422.dtbo
imx8mm-venice-gw73xx-0x-rs485-dtbs	:= imx8mm-venice-gw73xx-0x.dtb imx8mm-venice-gw73xx-0x-rs485.dtbo

dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw72xx-0x-imx219.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw72xx-0x-rs232-rts.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw72xx-0x-rs422.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw72xx-0x-rs485.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x-imx219.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x-rs232-rts.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x-rs422.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x-rs485.dtb

dtb-$(CONFIG_ARCH_S32) += s32g274a-evb.dtb
dtb-$(CONFIG_ARCH_S32) += s32g274a-rdb2.dtb
dtb-$(CONFIG_ARCH_S32) += s32v234-evb.dtb
+62 −84
Original line number Diff line number Diff line
@@ -12,11 +12,7 @@
/dts-v1/;
/plugin/;

/ {
	fragment@0 {
		target = <&mdio_slot1>;

		__overlay__ {
&mdio_slot1 {
	#address-cells = <1>;
	#size-cells = <0>;

@@ -26,23 +22,15 @@ slot1_sgmii: ethernet-phy@2 {
		compatible = "ethernet-phy-ieee802.3-c45";
	};
};
	};

	fragment@1 {
		target = <&enetc_port0>;

		__overlay__ {
&enetc_port0 {
	phy-handle = <&slot1_sgmii>;
	phy-mode = "usxgmii";
	managed = "in-band-status";
	status = "okay";
};
	};

	fragment@2 {
		target = <&mdio_slot2>;

		__overlay__ {
&mdio_slot2 {
	#address-cells = <1>;
	#size-cells = <0>;

@@ -67,12 +55,8 @@ slot2_qxgmii3: ethernet-phy@3 {
		compatible = "ethernet-phy-ieee802.3-c45";
	};
};
	};

	fragment@3 {
		target = <&mscc_felix_ports>;

		__overlay__ {
&mscc_felix_ports {
	port@0 {
		status = "okay";
		phy-handle = <&slot2_qxgmii0>;
@@ -101,13 +85,7 @@ port@3 {
		managed = "in-band-status";
	};
};
	};

	fragment@4 {
		target = <&mscc_felix>;

		__overlay__ {
&mscc_felix {
	status = "okay";
};
	};
};
+58 −80
Original line number Diff line number Diff line
@@ -11,11 +11,7 @@
/dts-v1/;
/plugin/;

/ {
	fragment@0 {
		target = <&mdio_slot1>;

		__overlay__ {
&mdio_slot1 {
	#address-cells = <1>;
	#size-cells = <0>;

@@ -25,23 +21,15 @@ slot1_sgmii: ethernet-phy@2 {
		compatible = "ethernet-phy-ieee802.3-c45";
	};
};
	};

	fragment@1 {
		target = <&enetc_port0>;

		__overlay__ {
&enetc_port0 {
	phy-handle = <&slot1_sgmii>;
	phy-mode = "2500base-x";
	managed = "in-band-status";
	status = "okay";
};
	};

	fragment@2 {
		target = <&mdio_slot2>;

		__overlay__ {
&mdio_slot2 {
	#address-cells = <1>;
	#size-cells = <0>;

@@ -62,12 +50,8 @@ slot2_qsgmii3: ethernet-phy@b {
		reg = <0xb>;
	};
};
	};

	fragment@3 {
		target = <&mscc_felix_ports>;

		__overlay__ {
&mscc_felix_ports {
	port@0 {
		status = "okay";
		phy-handle = <&slot2_qsgmii0>;
@@ -96,13 +80,7 @@ port@3 {
		managed = "in-band-status";
	};
};
	};

	fragment@4 {
		target = <&mscc_felix>;

		__overlay__ {
&mscc_felix {
	status = "okay";
};
	};
};
+43 −56
Original line number Diff line number Diff line
@@ -12,11 +12,7 @@
/dts-v1/;
/plugin/;

/ {
	fragment@0 {
		target = <&mdio_slot1>;

		__overlay__ {
&mdio_slot1 {
	#address-cells = <1>;
	#size-cells = <0>;

@@ -41,12 +37,8 @@ slot1_sxgmii3: ethernet-phy@3 {
		compatible = "ethernet-phy-ieee802.3-c45";
	};
};
	};

	fragment@1 {
		target = <&mscc_felix_ports>;

		__overlay__ {
&mscc_felix_ports {
	port@0 {
		status = "okay";
		phy-handle = <&slot1_sxgmii0>;
@@ -71,12 +63,7 @@ port@3 {
		phy-mode = "2500base-x";
	};
};
	};

	fragment@2 {
		target = <&mscc_felix>;
		__overlay__ {
&mscc_felix {
	status = "okay";
};
	};
};
+56 −78
Original line number Diff line number Diff line
@@ -11,11 +11,7 @@
/dts-v1/;
/plugin/;

/ {
	fragment@0 {
		target = <&mdio_slot1>;

		__overlay__ {
&mdio_slot1 {
	#address-cells = <1>;
	#size-cells = <0>;

@@ -24,23 +20,15 @@ slot1_sgmii: ethernet-phy@1c {
		reg = <0x1c>;
	};
};
	};

	fragment@1 {
		target = <&enetc_port0>;

		__overlay__ {
&enetc_port0 {
	phy-handle = <&slot1_sgmii>;
	phy-mode = "sgmii";
	managed = "in-band-status";
	status = "okay";
};
	};

	fragment@2 {
		target = <&mdio_slot2>;

		__overlay__ {
&mdio_slot2 {
	#address-cells = <1>;
	#size-cells = <0>;

@@ -61,12 +49,8 @@ slot2_qsgmii3: ethernet-phy@b {
		reg = <0xb>;
	};
};
	};

	fragment@3 {
		target = <&mscc_felix_ports>;

		__overlay__ {
&mscc_felix_ports {
	port@0 {
		status = "okay";
		phy-handle = <&slot2_qsgmii0>;
@@ -95,13 +79,7 @@ port@3 {
		managed = "in-band-status";
	};
};
	};

	fragment@4 {
		target = <&mscc_felix>;

		__overlay__ {
&mscc_felix {
	status = "okay";
};
	};
};
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