Commit 50cff45e authored by Jay Cornwall's avatar Jay Cornwall Committed by Alex Deucher
Browse files

drm/amdkfd: add debug trap enabled flag to tma 



Trap handler behavior will differ when a debugger is attached.

Make the debug trap flag available in the trap handler TMA.
Update it when the debug trap ioctl is invoked.

Signed-off-by: default avatarJay Cornwall <jay.cornwall@amd.com>
Reviewed-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: default avatarJonathan Kim <jonathan.kim@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 455227c4

drivers/gpu/drm/amd/amdkfd/kfd_debug.c

+11 −0
Original line number Diff line number Diff line
@@ -256,6 +256,8 @@ void kfd_dbg_trap_deactivate(struct kfd_process *target, bool unwind, int unwind 
		if (unwind && i == unwind_count)

			break;



		kfd_process_set_trap_debug_flag(&pdd->qpd, false);



		/* GFX off is already disabled by debug activate if not RLC restore supported. */

		if (kfd_dbg_is_rlc_restore_supported(pdd->dev))

			amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
@@ -351,6 +353,15 @@ int kfd_dbg_trap_activate(struct kfd_process *target) 
		if (kfd_dbg_is_rlc_restore_supported(pdd->dev))

			amdgpu_gfx_off_ctrl(pdd->dev->adev, true);



		/*

		 * Setting the debug flag in the trap handler requires that the TMA has been

		 * allocated, which occurs during CWSR initialization.

		 * In the event that CWSR has not been initialized at this point, setting the

		 * flag will be called again during CWSR initialization if the target process

		 * is still debug enabled.

		 */

		kfd_process_set_trap_debug_flag(&pdd->qpd, true);



		if (!pdd->dev->kfd->shared_resources.enable_mes)

			r = debug_refresh_runlist(pdd->dev->dqm);

		else

drivers/gpu/drm/amd/amdkfd/kfd_priv.h

+2 −0
Original line number Diff line number Diff line
@@ -1157,6 +1157,8 @@ int kfd_init_apertures(struct kfd_process *process); 
void kfd_process_set_trap_handler(struct qcm_process_device *qpd,

				  uint64_t tba_addr,

				  uint64_t tma_addr);

void kfd_process_set_trap_debug_flag(struct qcm_process_device *qpd,

				     bool enabled);



/* CWSR initialization */

int kfd_process_init_cwsr_apu(struct kfd_process *process, struct file *filep);

drivers/gpu/drm/amd/amdkfd/kfd_process.c

+15 −0
Original line number Diff line number Diff line
@@ -1309,6 +1309,8 @@ int kfd_process_init_cwsr_apu(struct kfd_process *p, struct file *filep) 


		memcpy(qpd->cwsr_kaddr, dev->kfd->cwsr_isa, dev->kfd->cwsr_isa_size);



		kfd_process_set_trap_debug_flag(qpd, p->debug_trap_enabled);



		qpd->tma_addr = qpd->tba_addr + KFD_CWSR_TMA_OFFSET;

		pr_debug("set tba :0x%llx, tma:0x%llx, cwsr_kaddr:%p for pqm.\n",

			qpd->tba_addr, qpd->tma_addr, qpd->cwsr_kaddr);
@@ -1345,6 +1347,9 @@ static int kfd_process_device_init_cwsr_dgpu(struct kfd_process_device *pdd) 


	memcpy(qpd->cwsr_kaddr, dev->kfd->cwsr_isa, dev->kfd->cwsr_isa_size);



	kfd_process_set_trap_debug_flag(&pdd->qpd,

					pdd->process->debug_trap_enabled);



	qpd->tma_addr = qpd->tba_addr + KFD_CWSR_TMA_OFFSET;

	pr_debug("set tba :0x%llx, tma:0x%llx, cwsr_kaddr:%p for pqm.\n",

		 qpd->tba_addr, qpd->tma_addr, qpd->cwsr_kaddr);
@@ -1431,6 +1436,16 @@ bool kfd_process_xnack_mode(struct kfd_process *p, bool supported) 
	return true;

}



void kfd_process_set_trap_debug_flag(struct qcm_process_device *qpd,

				     bool enabled)

{

	if (qpd->cwsr_kaddr) {

		uint64_t *tma =

			(uint64_t *)(qpd->cwsr_kaddr + KFD_CWSR_TMA_OFFSET);

		tma[2] = enabled;

	}

}



/*

 * On return the kfd_process is fully operational and will be freed when the

 * mm is released