Commit 50a7d025 authored by Tao Zhou's avatar Tao Zhou Committed by Alex Deucher
Browse files

drm/amdgpu: add RAS poison creation handler (v2) 



Prepare for the implementation of poison consumption handler.

v2: separate umc handler from poison creation.

Signed-off-by: default avatarTao Zhou <tao.zhou1@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent cc9d82fc

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

+44 −26
Original line number Diff line number Diff line
@@ -1515,33 +1515,27 @@ static int amdgpu_ras_fs_fini(struct amdgpu_device *adev) 
/* ras fs end */



/* ih begin */

static void amdgpu_ras_interrupt_handler(struct ras_manager *obj)

static void amdgpu_ras_interrupt_poison_creation_handler(struct ras_manager *obj,

				struct amdgpu_iv_entry *entry)

{

	dev_info(obj->adev->dev,

		"Poison is created, no user action is needed.\n");

}



static void amdgpu_ras_interrupt_umc_handler(struct ras_manager *obj,

				struct amdgpu_iv_entry *entry)

{

	struct ras_ih_data *data = &obj->ih_data;

	struct amdgpu_iv_entry entry;

	int ret;

	struct ras_err_data err_data = {0, 0, 0, NULL};

	int ret;



	while (data->rptr != data->wptr) {

		rmb();

		memcpy(&entry, &data->ring[data->rptr],

				data->element_size);



		wmb();

		data->rptr = (data->aligned_element_size +

				data->rptr) % data->ring_size;

	if (!data->cb)

		return;



		if (data->cb) {

			if (amdgpu_ras_is_poison_mode_supported(obj->adev) &&

			    obj->head.block == AMDGPU_RAS_BLOCK__UMC)

				dev_info(obj->adev->dev,

						"Poison is created, no user action is needed.\n");

			else {

	/* Let IP handle its data, maybe we need get the output

				 * from the callback to udpate the error type/count, etc

	 * from the callback to update the error type/count, etc

	 */

				memset(&err_data, 0, sizeof(err_data));

				ret = data->cb(obj->adev, &err_data, &entry);

	ret = data->cb(obj->adev, &err_data, entry);

	/* ue will trigger an interrupt, and in that case

	 * we need do a reset to recovery the whole system.

	 * But leave IP do that recovery, here we just dispatch
@@ -1555,6 +1549,30 @@ static void amdgpu_ras_interrupt_handler(struct ras_manager *obj) 
		obj->err_data.ce_count += err_data.ce_count;

	}

}



static void amdgpu_ras_interrupt_handler(struct ras_manager *obj)

{

	struct ras_ih_data *data = &obj->ih_data;

	struct amdgpu_iv_entry entry;



	while (data->rptr != data->wptr) {

		rmb();

		memcpy(&entry, &data->ring[data->rptr],

				data->element_size);



		wmb();

		data->rptr = (data->aligned_element_size +

				data->rptr) % data->ring_size;



		if (amdgpu_ras_is_poison_mode_supported(obj->adev)) {

			if (obj->head.block == AMDGPU_RAS_BLOCK__UMC)

				amdgpu_ras_interrupt_poison_creation_handler(obj, &entry);

		} else {

			if (obj->head.block == AMDGPU_RAS_BLOCK__UMC)

				amdgpu_ras_interrupt_umc_handler(obj, &entry);

			else

				dev_warn(obj->adev->dev,

					"No RAS interrupt handler for non-UMC block with poison disabled.\n");

		}

	}

}